Acquisition of ADC four digital signals

[Lep]

I want to use stm32 to collect ADC digital data. The output of ADC is four digital signals D3, D2, D1, D0 and one clock signal CLK2. I need to add a digital low-pass filter (like fir),

how do I collect this 4bit digital signal...

Thanks in advance.

[waclawek.jan]

​Which STM32? What ADC?

If it's 4 serial signals of a 4-channel ADC, ​use 4 SPI or SAI.

JW​

[Lep]

MCU is STM32WB55RGV6. ADC chip is made by myself. It does not integrate spi iic and other interfaces. Its output is four digital signals, so I need to collect these four digital signals and conduct digital low-pass filtering.

[S.Ma]

Stn32 adc usually get analog inputs.

If your 4 signals are.digital, say pwms, you need digital timer.input capture channels to measure the duty cycle.

[Lep]

Thanks for your help, input capture is able to measure duty cycle and measure frequency. Because this adc chip is made by myself, there is no interface such as spi, it is used to measure the ecg signal, how should I use it (for example, D3 has two consecutive samples of high level, and the edge capture is not very reliable). Excuse me Is there any example?

[MM..1]

CLK2 value? Valid data timing?

[Lep]

clk2 rising edge trigger, output 4bit data (D3 D2 D1 D0)

[MM..1]

MHz value ??? and rename your question your problem isnt about ADC

[Lep]

The sampling frequency is 256kHz, it is an ADC that collects ECG signals.(The question is really not about ADC), what should I belong to with this question?

My problem is that the analog signal is output in four channels in parallel after the ADC, when clk2 is rising edge (256kHZ), the digital signal of 4bit is output (D3 D2 D1 D0). I want to use stm32wb55rgv6 to capture these signals, where should I start?

Translated with DeepL

[MM..1]

For this speed you can use EXTI interrupt on clk pin and sw handled read GPIO data pins and store it. After buffer is stored you can do over it filter.