Unable to get data in SRAM1 when DMA1 is configured for I2S2, in STM32H753xx

[KM.12]

​Hi STM community,

I have created stm32 project in STMCubeIDE. I2S2 configured as Half duplex Master in receive mode, 16k audio frequency and 24 bit on 32 bit format. Able to receive data in polling mode.

But not able to receive data in SRAM1 memory when DMA1 stream 0 is configured in normal mode. Used HAL dma api for receiving I2S data. 

Breakpoint hits DMA interrupt handler and RX Complete handler, but still there is no data in the destination address. Checked source and destination addresses and these are programmed as expected. Also able to get data in RX data register of I2S peripheral. But data is not copied to RAM. The DMA channel is also enabled for reception (RXDMAEN). The DMA stream request number is also as expected (39). DMA clock is also enabled.

I have tried creating project with STM32CubeIDE 1.5.0 and 1.6.0. However, DMA is not available for I2S2 on IDE v​ersion 1.7.0.

Please find the project in the attachment.

No idea why data is not received in the destination address/RX buffer array.

Thanks and regards

KM​

[waclawek.jan]

Cache issue?

https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices

JW

[KM.12]

Hi,

C​ache has been disabled. Moreover i have tried to invalidate cache when cache was enabled. Still there is no data.

I have also tried to allocate dma buffer from SRAM1 and not from DTCM.

​Thanks

​KM

[TDK]

Initialize the array with a known pattern and check it during the DMA complete interrupt to verify it hasn't been written to. Double check DMA settings before/after the transfer to verify correctness.

[waclawek.jan]

> Checked source and destination addresses

How? Have you actually read out content of the DMA registers?

JW

[KM.12]

Yes...I have checked the contents of DMA registers. ​

[MM..1]

Is init order

MX_DMA_Init()
MX_I2S2_Init()

[KM.12]

Yes...the init order is same

[KM.12]

Please find the project in the attachment