TIMx "DMA Burst Feature" triggering multiple DMA requests over SPI

[NCentI]

I'm trying to receive many 24 bits transfers over SPI with no interrupts. SCLK needs to be driven by the STM32. The throughput required would starve out the CPU if any interrupt was needed between/on transfers.

From other forum posts, I've seen that this can be complicated business as the SPI peripheral supports a max of 16 bit transfers.

I haven't seen anyone using the Timer DMA-burst feature though.

I'd like to use a timer to trigger a DMA/SPI transfer, but I'd need 3x 8 bit requests for every trigger. AN4776 5.1/5.2 describes a "Timer DMA-burst feature" that sounds like it could do something like this. I've never seen anyone on forums use it for something like this. Would this work? Am I misunderstanding the datasheet?

Alternatively, I could control the SPI clock with an advanced one-pulse timer and configure a RX DMA/SPI to just read in bytes as they come. However, this would require some hardware modifications that I'd rather avoid.

[waclawek.jan · Accepted solution]

Which STM32?

TIM "burst" works only with TIM as target.

Generating complex clocks using interconnected timers at the cost of one pin connected externally, sound like a good plan.

Alternatively, you can trigger SPI Tx DMA by using timer DMA to store a prepared value into the SPI Tx DMA channel/stream control register.

JW

[NCentI]

Ahhh OK, thanks for clarifying the reference manual didn't make that clear. Got the one-pulse timer clocking the SPI bus to work, so I think I'll roll with that.

Thanks!