cancel
Showing results for 
Search instead for 
Did you mean: 

Timmer input STM32F429

cmackinnon
Associate II

Fig 9 of the STM32F429 datasheet it effectively states that the external source clock/signal has to be 1/3 of the Timer clock – makes sense as you want to ensure you capture the edge of the input signal.

 However, the Ref manual section 17.4.3, the reg setting(bits 12 and 13)for the timer states that the external trigger must be ¼ of the timer clock

Are they contradicting themselves or are they referring to two different things?

4 REPLIES 4

Typically you're dealing with the APB clock source in to the resynchronizer.

Surely this TIMCLK is going to be orders of magnitude faster than the thing you're sampling to get any sort of granularity or resolution. ie 50 Hz servo signal into a 90 or 180 MHz timer

There's also a input prescaler, and a clock divider related to filtering or sampling of inputs.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
Thanks
The input pulse is only 10ns wide - it could be anywhere from a 50Mhz clock to just 1 pulse every few seconds, but I cannot afford to miss one.
Calum
Calum Mackinnon
Engineering Manager
T: +1 425-653-6545|M: +1 425-785-6706
E: cmackinnon@arrow.com
Arrow Electronics | arrow.com

> Fig 9 of the STM32F429 datasheet

Show.

> trigger must be ¼ of the timer clock

Even if it may be a typo/mistake/inadvertent or deliberate misinformation, as long as you don't have other authoritative information, consider the worst case information to be the case.

Please note that this is a primarily user-driven forum with only casual ST presence. This question can't be answered authoritatively without ST, so if you want that, contact ST directly. You appear to have a FAE at hand...

And if you do so, please ask them to come here with the explanation.

JW

PS. You probably answered through e-mail so exposed personal info.

Bob S
Principal

Version 10 of the F427/429 data sheet (web site says May 2021 but doc says updated 19 Jan 2019), table 60 (TIMx Characteristics) says fTIMxCLK/2. Figure 9 that you mentioned is unrelated. The timer app notes (AN4776 and one other I can't find at the moment) mention /3. I hadn't noticed the /4 in the ref man for the ETPS bits before now. The synchronizer circuit is 2 sequential flip flops clocked by the timer clock. So to me, /2 makes sense as the Nyquist frequency, and /3 as a rule of thumb or safety factor.

But, yeah, as @Community member​ suggested, it would be nice to have a definitive answer from ST.