Tacq STM32G0x0

[gomezramones]

Hi. 

We are using STM32G0x0 family in our project. We are running ADC clock at 30MHz. The sampling time is 7.5 cycles, we configure the ADC to trigger every 500uS so Trigger Frequency = 2kHz  and the resolution is 10bits. I know the Tconv = Tsampling + 12.5 = 20cycles = 666.7 nS. How do I calculate Tacq? 

[TDK]

Tconv is the total time for a conversion to take place. If you are triggering at 2 kHz, the ADC will be busy for the first 666.7 ns after the trigger, then it will wait for the next trigger.

What do you mean by Tacq? Neither the datasheet nor the reference manual contain the word "Tacq".

[gomezramones]

Tacq = Acquisition time. It is the time required for the Analog-to-Digital Converter (ADC) to capture the input voltage during sampling. 

I am simulating this circuit basically, where it models the ADC. In the image Cin = 45pF, but in my case Cin = 5pF. Tconv = Conversion time = Tsamp + 12.5cycles. Additionally
Sampling Rate = Tacq + Tconv. In the example, they choose Sampling rate = 1MSPS, Tconv = 688ns and Tacq = 312nS. 

The example is using an ADC from LTspice but in my case, I am using a STM32G0x0 MCU. So if I am sampling every 500uS, then my sampling rate is 2KSPS no? Is this possible? Because the DS shows the Maximum Tsampling is 4.56uS at fADC = 35 MHz. I am a hardware engineer, not a firmware engineer. 

Additionally, I found that the RC filter must comply with this: https://community.st.com/t5/stm32-mcus-products/is-there-any-required-external-circuitry-for-the-adc/td-p/189255. That's why I am interested to find my Tacq. 

[TDK]

Tacq = Tsampling / fADC

In this case, Tacq = 7.5 / 30 MHz = 250 ns.