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STM32U5 extended calibration procedure in RM0456 Rev 5 page 1269 is buggy

Hello,

I was trying to implement extended calibration for ADC1 on my STM32U575 according to RM0456 Rev 5.  I have a revision ID 0x3001 chip which should support extended calibration.  The chip would hang very badly (can no longer connect with debug probe!) after step 6 ("Set the LATCH_COEF bit").  I took a look at the HAL code in stm32u5xx_hal_adc_ex.c  and it is doing a few things differently:

  1. Using DMB instructions between setting CALINDEX and CALFACT and between setting CALFACT and setting LATCH_COEF.
  2. Preserving the low-order 8 bits of CALFACT when writing 0x03021100 to the register.

When I changed my code to do those two things the ADC now completes calibration properly and doesn't hang my debug connection.

It would be helpful if the RM could be updated accordingly!

Thanks,

TG

1 ACCEPTED SOLUTION

Accepted Solutions
KDJEM.1
ST Employee

Hello @Terry Greeniaus ,

 

Thank you for bringing this issue to our attention.

I reported internally.

The internal ticket 183050 (not accessible by community users) has been opened to confirm and fix the issue.

Thank you for your contribution in STCommunity.

 

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

1 REPLY 1
KDJEM.1
ST Employee

Hello @Terry Greeniaus ,

 

Thank you for bringing this issue to our attention.

I reported internally.

The internal ticket 183050 (not accessible by community users) has been opened to confirm and fix the issue.

Thank you for your contribution in STCommunity.

 

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.