STM32H735V (LQFP100) PC2_C and PC3_C speed

[heveskar]

Hello,

I have a problem with pins PC2_C and PC3_C on STM32H7. We have custom board based on this MCU and we want to interface SD card via SPI. We are using these pins: PA9 as SCK, PA0 as CS, PC2_C and PC3_C as MISO and MOSI respectively. I can not initialize the SD card to SPI mode and I think that the problem is caused by PC3_C pin. This MCU does not have PC2 and PC3 connected to external pads, so we must close the analog switch between PC2+PC2_C and PC3+PC3_C. This is done using SYSCFG_PMCR register. By my understanding, those switches are on this MCU closed by default, but I can close them either way using:

HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC2, SYSCFG_SWITCH_PC2_CLOSE);
HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, SYSCFG_SWITCH_PC3_CLOSE);

The switches close properly, as I can control those two pins manually. Now my problem is that on pin PC3_C - MOSI, the edges during SPI communication are so slow, that the SD card is not working.

I tried toggling the pins manually with pulse width around 1.4 us and curious thing is that while pin PC2_C is working well enough, PC3_C is so slow that its value does not even reach 3.3V, see picture:

You can see that PC2_C (blue one) has rise time about 100 ns, PC3_C (red one) has more than 1.3 us.

I tried setting pin speed to Very High using the OSPEED register, but it did not help much.

According to datasheet page 68, those two pins have structure TT_A instead of FT_A, but i did not find anywhere what that means for the output frequency (only details I could find is Figure 77 in the RM). In the table 57 on datasheet page 161 (Output timing characteristics), there I could not find anything about those particular pins. According to this table, rise time of all pins in Very High speed is around 3 ns, which pin PC3_C exceeds by few orders of magnitude.

I found that minimum impedance of the analog switch for 3.3 V VDD is probably 315 Ω (datasheet page 163), but I do not know if it is of any help. Weird is that most people in other threads have problems with pin PC2_C and PC3_C is good, whereas I have it other way round.

So, am I missing something and is there any other way to change output speed of the pins, or there is just physical limitation that the edge cannot be faster than that? If it is the latter, I think it should be mentioned somewhere in the documentation (I could not find it).

There are few similar questions, but neither has a solution:

https://community.st.com/s/question/0D50X0000AxFsTqSQK/stm32h743z-lqfp144-gpio-not-working-on-pc2c-and-pc3c

https://community.st.com/s/question/0D50X0000AaZDf0SQG/problem-with-tx-clk-for-mii-interface-analog-switch-between-pc3c-and-pc3

https://community.st.com/s/question/0D53W00000CRxrz/smt32f7-or-stm32h7-fmc-sdram-controller-config-documentation

Thanks for reply,

Karel

[heveskar]

Yes, those macros really are PC2 and PC3. From main.h:

#define SPI_SD_MISO_Pin GPIO_PIN_2
#define SPI_SD_MISO_GPIO_Port GPIOC
#define SPI_SD_MOSI_Pin GPIO_PIN_3
#define SPI_SD_MOSI_GPIO_Port GPIOC

Physically they are connected to PC2_C and PC3_C as this package does not have PC2 and PC3 bonded out:

 

Karel

[Amel NASRI]

Hi @heveskar​ ,

Sorry to come back late to our discussion. I would like to know if you have some news on your side, hoping that your issue is already fixed.

I would like to bring to your attention a particular condition mandatory to make Px_C pins work properly on STM32H735 devices (highlighted in AMR conditions in product datasheet:(

It is mandatory to not exceed 1mA as output current sunk by Px_C pins.

-Amel

[heveskar]

Hi @Amel NASRI​,

I did not manage to fix it yet. Last thing I tried was cutting the trace on our board effectively disconnecting the ESD314 protection diode and SD card connector. Then I measured the signal directly on MCU pins and the problem was still there. Edge is a liiitle bit faster but still not correct:

Main thing that baffles me is that since PC2_C and PC3_C have exactly same internal structure, why is not the issue present in both of them?

About the table you are citing: yes, I know about that. I have to disagree with you a little: this should mean that output current sink is 1mA, no? Not that output current must not exceed 1mA, since it is written like that. This would mean that the falling edge would be slower, not both rising and falling. Limitation really about output current I did not find anywhere. Therefore, we do not think that this is the culprit. We are starting to think that this issue is some limitation in the sillicon, but we may be wrong.

Karel

[Amel NASRI]

> About the table you are citing: yes, I know about that. I have to disagree with you a little: this should mean that output current sink is 1mA

Right! I edited my post.

That's curious & still need some more investigation.

-Amel

[heveskar · Accepted solution]

Per our information directly from ST, this is a confirmed bug in sillicon and it will appear in an errata when they know exactly what causes the problem as they are not sure yet. They will fix the hardware only if they make new revision, which is not sure will happen.