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STM32H7 PCx_C pins unusable for boundary scan?

regjoe
Associate II

Hello,

I used CubeMX for a design for H75x in LQFP176.

I was able to configure SDCKE0+SDNE0 signals of SDRAM Bank 1 to PC2_C and PC3_C.

Now I wanted to configure a SDRAM test using JTAG boundary scan but the JTAG tool manufacturer claims that these PCx_C pins cannot be used for boundary scan.

 

In the BSD file STM32H743_753_LQFP176.bsd these pins are declared as "linkage bit".

 

PC2_C      : linkage bit;
PC3_C      : linkage bit;

 

In the BSD file STM32H743_753_TFBGA240.bsd for the BGA package, which has both PCx and PCx_C pins, only the PCx_C analog pins are declared as "linkage bit". 

 

PC2        : inout   bit;
PC2_C      : linkage bit;
PC3        : inout   bit;
PC3_C      : linkage bit;

 

 

According to DS12117 Rev 9, the LQFP176 package has PC2_C and PC3_C pins only and the internal pads PC2 and PC3 are not routed to physical pins.

According to RM0433 12.3.1 the default state after reset is analog switch closed.

IMHO this pin is a GPIO pin after reset. Due to lack of HW I cannot verify this at the moment. 

 

Therefore, shouldn't be PCx_C in the LQFP176 BSD file also of type "inout bit" and can be used for boundary scan?

2 REPLIES 2
ELABI.1
ST Employee

Hello @regjoe,

You cannot use these pins for the SDRAM. However, you can use other available options such as pin PH3 or PC4 for SDNE0 instead of PC2_C, and pin PH2 or PC5 for SDCKE0 instead of PC3_C.

There is a limitation - Errata regarding the current on these pins precisely in the section 2.2.25.

Thank you.

ELABI.1

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Hello ELABI.1,

too bad.

Seems that CubeMx isn't aware of this limitation.

Here you can configure Pxy_C pins for Ethernet, SPI, SDRAM, etc. and in all speed options including high speed.

IMHO the high speed option requires a drive strength >> 1mA.

I wonder if there is a chance that SDRAM works despite the 1mA limitiation.

Probably with lower clock rate.

 

In DS12117 rev9 Table 8 Pxy_C pins have attributes ANA and TT_a but I cannot find a documentation regarding these attributes. Second, is there any information from ST avaliable regarding "boundary scan capable pins"?

DS12117_rev9_table8_pins.png

Thank you