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STM32F746IGT - Cannot trigger ADC conversion with Timer 4

RZieb
Associate II

Hello,

I'm working on hobby project using STM32F746IGT. I wrote ADC init sequence but cannot get it working properly. Timer 4 reloads at given period and It's interrupt is called properly. ADC starts conversion after setting SWSTART bit manually but I cannot make Timer4 to trigger ADC1.

Please help :)

void adc_init( void )
{
	RCC -> APB2ENR |= RCC_APB2ENR_ADC1EN;
	RCC -> APB1ENR |= RCC_APB1ENR_TIM4EN;
	RCC -> AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOHEN;
 
	gpio_pin_cfg(GPIOA, 7, GPIO_ANALOG);
 
	// Timer 4 TRGO
	// Max 36 MHz @ 3.3V
	ADC->CCR = ADC_CCR_ADCPRE_0 | ADC_CCR_ADCPRE_1;
 
	ADC1->CR2 =  ADC_CR2_EXTEN_0 | ADC_CR2_EXTSEL_3 | ADC_CR2_EXTSEL_2 |  ADC_CR2_ADON;
	ADC1->CR1  = ADC_CR1_SCAN | ADC_CR1_DISCEN | ADC_CR1_EOCIE;
	ADC1->SQR1  = 0;  				// 1 regular conversion
	ADC1->SQR3  = (7 << 0);    		// 1st conv IN7
	ADC1->SMPR2 = (0b001 << (7*3)); // IN7 112 cycles
	NVIC_EnableIRQ( ADC_IRQn );
	NVIC_EnableIRQ( TIM4_IRQn );
 
	ADC1->CR2 |= ADC_CR2_SWSTART;
 
	// Sampling 16000 Hz
	//
	TIM4 -> ARR = 125 - 1;
	// 500ns tick
	//
	TIM4 -> PSC = 216/2/2 - 1;
	TIM4 -> CNT = 0;
	TIM4 -> EGR = TIM_EGR_UG;
	TIM4 -> CR2 = TIM_CR2_MMS_1;
	TIM4 -> DIER = TIM_DIER_UIE;
	TIM4 -> CR1 |= TIM_CR1_CEN;
}
 
 
void ADC_IRQHandler(void)
{
	ADC1->SR = 0;
	ADC->CSR = 0;
	//static uint8_t val = 0;
	double in = (double)(ADC1->DR-2048.0)/4096.0;
	in++;
}
 
void TIM4_IRQHandler(void)
{
	TIM4->SR = 0;
}

1 ACCEPTED SOLUTION

Accepted Solutions
RZieb
Associate II

According to Erratasheet enabling DAC (!) clock is mandatory to get TRGO signal working:

RCC -> APB1ENR |= RCC_APB1ENR_DACEN;

It would be much easier for developers if they have placed that piece of information in ADC paragraph ;)

View solution in original post

11 REPLIES 11

Looks OK.

SCAN and DISCEN are maybe redundant, but shouldn't make harm, similarly TIMx_DIER and clearing ADC_CSR (which is a read-only copy of the individual status registers).

Try to read out and check content of both TIM and ADC registers, maybe observing the status register(s).

JW

Thank you for your response.

Unfortunately every flag in registers seems OK. Probably there are some hardware issues with internal TRGO matrix.

RZ

RZieb
Associate II

According to Erratasheet enabling DAC (!) clock is mandatory to get TRGO signal working:

RCC -> APB1ENR |= RCC_APB1ENR_DACEN;

It would be much easier for developers if they have placed that piece of information in ADC paragraph ;)

Kudos for finding this.

Thanks for coming back with the answer. Please select your post as Best so that the thread is marked as Solved.

JW

What a bizarre requirement. Thanks for reporting. Sure enough, that's exactly what Cube examples do. Wonder if generated code would do the same as well.

https://github.com/STMicroelectronics/STM32CubeF7/blob/c7c5ec99c7482ea8bcdbf0a869c930af4547088f/Projects/STM32756G_EVAL/Examples/ADC/ADC_TriggerMode/Src/main.c#L94

If you feel a post has answered your question, please click "Accept as Solution".

> Sure enough, that's exactly what Cube examples do.

Oh, between steps 4 and 3 (in this order). Without a single line of explanation. Very characteristic.

JW

Yep, it should have a comment to explain. But it is there.
CubeMX generated code does not enable the DAC clock. I'm sure that will burn someone in the future. Probably already has.
If you feel a post has answered your question, please click "Accept as Solution".
RZieb
Associate II

> Oh, between steps 4 and 3 (in this order). Without a single line of explanation. Very characteristic.

Indeed... What a mess...

> CubeMX generated code does not enable the DAC clock. I'm sure that will burn someone in the future.

It did.

https://community.st.com/s/question/0D53W000028TMnYSAW/stm32f746-adc3-does-not-work-with-external-trigger-from-timer

@Amel NASRI​ , can you please have a look at this?

Thanks,

JW