STM32F405RG weird ADC spikes

[LLOLO.1]

Hi I am working on a small project where I need to sample couple of ADC channels.

I am using STM32F405RG. ADC1 is running in continuous and scan mode with DMA. I am using ping pong buffers to send ADC data through USART.

After gathering some data I plot them in MATLAB.

Problem is that there are random spikes in my ADC values an example is shown below.

X axis is Seconds, Y axis is voltage. Graph belongs to an ADC channel where approximately 2.6 volts needs to be read.

 

Has anyone encountered this ?

[Ozone]

The scale is a bit out of proportion, albeit 150mV is not just noise.

What are your input parameters and ADC settings (input impedance, sampling time) ?

Is Vdda kept separate from Vdd, and properly filtered/stabilized ?

Have you tried to observe it (Vdda) simultaneously with the ADC values on a scope ?

[waclawek.jan]

This is most likely consequence of switching of the sampling capacitor.

JW

[LLOLO.1]

I set ADC input impedance according to reference manual formula which resulted in Rin = 22kohms. Overall sampling frequency is 200ksps so for 8 channels 25ksps/ch. There is ferrite bead between Vdda and Vcc and recommended capacitors between Vdda and ground. I measured both Vcc and Vdda they seem to be ok. I measured Vdda there are no voltage dipping when sampling.

[LLOLO.1]

Can 22kohms input impedance with switching cap cause this ?

[Ozone]

That does not sound correct to me.

The input must be capable of fully charging (or discharging) the S&H capacitor over the sum input impedance in the given sample time.

A simple RC network as first-order approximation.

I would expect a one order of magnitude smaller Rin.

[LLOLO.1]

Well, APB2 Clock is 64Mhz divided by ADCPRE = 2 results in 32MHz. 28Clock cycle is selected and with 12 bit ADC total clock cycle is 40. 32Mhz/40 = 800kHz but I am triggering ADC with Timer which is set to 200kHz. I am calculating Rin according to set ADC values.

[LLOLO.1]

Correct me if I am wrong but noise seems to be random. If this was due to switching capacitor wouldnt be this periodic?

[waclawek.jan]

> 28Clock cycle is selected

The sampling capacitor is switched to input signal source for those 28 clock cycles, i.e. less than 1us. The signal source must be capable of fully charging that capacitor in that time.

If the above picture is output of ADC rather than voltage on the pin observed by oscilloscope, it still may be also other reasons mentioned by Ozone.

JW

[LLOLO.1]

I have increased the sampling time to124 cycles and spikes still occur. I am confused.