STM32F4 I2S slave issue (one more time :()

[yuriy]

Posted on March 19, 2015 at 22:55

I try to connect audio channel of GSM module with STM32F401 throw full-duplex I2S interface which operate in PCM audio protocol. I configure DMA for rx & tx by 10ms chunk of data - and everything works fine except that incoming data shifted by random numbers of bit :(.

I read errata of I2S slave mode and understand that this issue is exactly from errata. But unfortunately GSM module can be only the master in this connection. Also the main problem in this connection that GSM module enable PCM interface only on data available, otherwise GSM module stop it. More worse in this situation, than before on and off of PCM interface GSM module generate some random clock :( (see attached images).One of the main my idea to apply workaround of this issue was to configure EXTI interrupt on WS/SYNC ping & in this interrupt enable I2S periphery. And it's work for first audio data stream, but than I can't find proper way to correct disable I2S periphery & enable it again, on another audio data stream.In general try enormous scheme of enabling & disabling I2S periphery, but can't get stable result. In one case I2S just stop working (if I clear I2SE bit without waiting for TXE = 1 and BSY = 0), in another it receive shifted data.May be someone could suggest some another mechanics of proper syntonization of I2S enable & disable in this situation. #i2s #stm32 #dma #full-duplex

[waclawek.jan]

Posted on March 20, 2015 at 08:12

This sounds like a showstopper. You might want to consider a different device, capable of handling PCM slave correctly, at this point.

Maybe the SAI module found in the '42x/43x/446 might be able to handle this. JW

[yuriy]

Posted on March 20, 2015 at 10:36

JW, I was afraid that you would say that :(. Just look at SAI periphery of STM32F42x - definitely it will do its job (and omission of this periphery in errata gives confidence). But the price difference between STM32F401 & STM32F42x move this solution at the end of my empty (for now) list.

JW, could you please clarify me one more time, what is exactly wrong with I2S in slave mode? What is exactly happen in I2S periphery in this mode?Errata said that ''In slave mode, the WS signal level is used only to start the communication.''. What exactly does it mean? By which clock this first WS synchronize (by internal clock or by external I2S master clock)? Does this mean that periphery need only one WS strobe (when I disable WS completely periphery doesn't start), and all other (till the periphery disable) ignored?I have hope to build some external logic with tigers, counters & etc. to remove odd I2S master clock ticks from GSM module. But for now I can't understand what exactly logic I need to build :(.

[yuriy]

Posted on March 21, 2015 at 15:40

It was not easy, but I have overcome this STM32 I2S slave issue & problematic GSM module behavior :).

Several hits for other who can face the same situation:

• use EXTI interrupts on WS & another pins to handle I2S enable on necessary condition (EXTI interrupts works even if pin configure with alternative function)
• during initialization of I2S slave configure CK pin just as INPUT, and turn it alternative function (CK) only after necessary condition (in EXTI interrupt for example), and when audio data exchange finished configure it as INPUT again, until next necessary condition (it is much easy than stop I2S slave transition without clock :))

[waclawek.jan]

Posted on March 22, 2015 at 10:44

Thanks for sharing your experience.

So you gate the I2S clock before *every* start of frame? This sounds like quite a burden on the processor.... that's of course OK if it solves the problem. JW