SYSCFG_CFGR1.ENCODER_MODE is a two-bit bitfield, which - besides a "no remap" apparently allows a remap, documented as TIMx IC1 and TIMx IC2 are connected to TIM15 IC1 and TIM15 IC2 where TIMx is TIM2, TIM3 and TIM4 for the various setting of bitfield.
This is cryptic and I couldn't find any further reference to this bitfield in any associated material, so let me try to look into the crystal cube.
As TIM15 according to all available materials does not have an encoder interface in the slave-mode controller, this probably means, that the two inputs of TIM15 are connected also to the respective first two inputs of selected TIMx. But, as wording uses "TIMx_ICy" which is the filtered version of input, it's not clear, whether the filtering occurs already at TIM15 or at the "target" or both. The options, when the redirection is set, are:
- TIM15_CH1/CH2 pins are directly connected to TIMx_CH1/CH2 input (possibly through a mux or through an OR gate together with the given TIMx's CH1/CH2 pin); this would then also allow to use TIMx's input capture to work out of the TIM15_CH1/CH2 signals
- TIM15_CH1/CH2 pins are connected to TIM15_CH1/CH2 input, undergo input filtering, possibly also the channels swap; and then are connected to TIMx_CH1/CH2, where they can again be filtered/swapped (again this allows input capturing in TIMx)
- TIM15_CH1/CH2 are are connected to TIM15_CH1/CH2 input, undergo input filtering/swap, and then they are directly fed into TIMx's slave-mode controller's encoder input (without possibility to use them in TIMx for input capture)
- any other combination I did not think of.
Can ST please clarify. A diagram would come handy.
Thanks,
JW
