2025-07-23 2:09 AM - last edited on 2025-07-23 2:34 AM by Andrew Neil
Hello, I have purchased and used the NUCLEO-F303RE board.
I am trying to control the LED (PA5) using bit-banding.
With reference to the reference manual, I confirmed that the address of GPIOA starts from 0x48000000.
Then, I found and read the PM0214 document, which seems to say that only Peripheral in the area of 0x40000000-0x400FFFFF can be controlled.
So you are saying that my f303re board can't control gpio using bit_banding? And if so, how can I control it directly? Thank you.
This is my code.
/*
* bitband.h
*
* Created on: Jul 23, 2025
* Author: giwon30
*/
#ifndef INC_BITBAND_H_
#define INC_BITBAND_H_
#include "main.h"
//giwon 250723
//bit banding
//STM32F303RC
#define GPIO_PORT_A 0x48000000UL // GPIOA 베이스 주소
#define FIXED_GPIO_PIN_5 5 // PA5 핀
// GPIOA의 ODR 레지스터 주소 (출력 데이터)
#define GPIOA_ODR (GPIO_PORT_A + 0x14)
// 비트밴딩 별칭 영역 매크로 정의 (SRAM 영역)
#define BITBAND_SRAM_BASE 0x40000000UL
#define BITBAND_SRAM_ALIAS_BASE 0x42000000UL
// 비트밴딩 주소 계산 매크로
#define BITBAND_SRAM(address, bit) (BITBAND_SRAM_ALIAS_BASE + ((address - BITBAND_SRAM_BASE) * 32) + (bit * 4))
#define GPIOA_ODR (GPIO_PORT_A + 0x14)
#endif /* INC_BITBAND_H_ */
*(volatile uint32_t*)BITBAND_SRAM(GPIOA_ODR, FIXED_GPIO_PIN_5) = 1; // LED ON
2025-07-23 2:33 AM
@giwonKIM wrote:how can I control it directly?
What do you mean by "directly" here?
You can use the BSRR (Bit Set and Reset) or BRR (Bit Reset) registers ?
2025-07-23 2:51 AM
I talked about the method.
Can't I control it using bit-banding other than that?
Because I want to control GPIO ASAP.
2025-07-23 3:06 AM
I was answering your "If so, ..." question.
You can also drive GPIO via DMA...
2025-07-23 5:32 AM
The BSRR register was created to control a pin without affecting other pins.
To turn PA5 on:
GPIOA->BSRR = 1 << 5;
To turn PA5 off:
GPIOA->BSRR = 1 << (5 + 16);
2025-07-23 8:44 AM - edited 2025-07-23 8:50 AM
I tested with F303 some y ago :
test speed with scope on a pin : 16ns BSRR , + while-loop 65ns , @60MHz core !
(while loop needing 3 cycles .)
So this is 1 clk cpu cycle - faster is not possible , obviously. (No bitbanding needed for "more speed" . )
2025-07-23 8:53 AM - edited 2025-07-23 8:54 AM
It's also a SINGULAR write, not RMW (Read Modify Write) which is going to have significant delay, think write-buffers and in-order completion over the AHB/APB busses.
Bit-Banding isn't remotely more efficient, it just hides the RMW action, but has a lot of hazards of it's own, like clearing TIM->SR bits. It's perhaps best only used on RAM memory variables, as a means to force atomic interaction, which isn't possible in peripheral space as they operated independently / concurrently via own internal combinational and synchronous logic.
The BSRR is the approved, desirable way to do single or multi-bit changes to the GPIO pins on the bank, and without interfering with uninvolved pins.
Usable with 32-bit word DMA from pattern buffers.