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Possible risks of voltage drop in VDD of STM32F3

mechatron
Associate II

Hi !

I am evaluating the risks associated with STM32F3, where I am speculating a case where the voltage drops in VDD for few microseconds. For an example, let us assume the voltage drops from 3.3V to 3.0V for few microseconds. This occurs every x ms (assume 1 or 10). Now, 3.0V is still a good range, but will this constant voltage drops lead to any risks over longer time? Any corruption in flash memory or weakening of protection diodes, etc..??

There are EMC related risks I understand from hardware perspective. What I am interested in is, the parts of controller that might be affected in the long run.

Thanks!

1 ACCEPTED SOLUTION

Accepted Solutions
Peter BENSCH
ST Employee

With the exception of the STM32F378, all STM32F3 are specified for 2.0-3.6V and function without restriction for voltage drops within this range. You can therefore rest assured that there will be no defects in this respect.

However, you should also be able to compensate for voltage drops in the microsecond range by selecting the appropriate buffer capacitors connected to the VDD pins.

Hope that helps?

Regards
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

3 REPLIES 3
Peter BENSCH
ST Employee

With the exception of the STM32F378, all STM32F3 are specified for 2.0-3.6V and function without restriction for voltage drops within this range. You can therefore rest assured that there will be no defects in this respect.

However, you should also be able to compensate for voltage drops in the microsecond range by selecting the appropriate buffer capacitors connected to the VDD pins.

Hope that helps?

Regards
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Hi Peter,

 

Thanks for the response. Yes, adding buffer caps sure helps. But I am analysing the risks in case no caps can be added (layout change not possible, for example). Considering long term use (>5 years), won't the voltage drops (every 1 or 10 millisecond) affect the internal structure of MCU in any ways? I am still a bit sceptical about it. 

 

Best Regards

As mentioned in the first sentence of my previous statement: no, it won't affect the structures of the MCU.

Regards
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.