Hello,
I'm using Timer_2 channel_1 PWM with DMA to generate the low polarity Pulse.
I set the value of PSC = 72, ARR = 2000 and Fosc = 72 MHz.
uint16_t TIM2_CCR1_Value[25] = {2100, 2100, 2100, 2100, 2100, 2100, 2100, 2100, 1200, 1500, 1500, 1500, 1500, 500, 1500, 1500, 1500, 1500, 500, 500, 1500, 1500, 1500, 1500, 500};
Explanation of above I given TIM2_CCR1 array value,
Free bit {2100, 2100, 2100, 2100, 2100, 2100, 2100, 2100} = {0, 0, 0, 0, 0, 0, 0, 0}.
Start bit 1200 mean 1.2ms off and 0.8ms on.
Data_0 {1500, 1500, 1500, 1500, 500, 1500, 1500, 1500} = {0, 0, 0, 0, 1, 0, 0, 0}.
Data_1 {1500, 500, 500, 1500, 1500, 1500, 1500, 500} = {0, 1, 1, 0, 0, 0, 0, 1}.
below I given the TIM2_CCR1 array values WaveForm,
I don't know where I made a mistake and how to slove this.
hi,
i upload my code,
#include<stm32f10x.h>
uint16_t TIM2_CCR1_Value[25] = {2001, 2001, 2001, 2001, 2001, 2001, 2001, 2001, 1200, 1500, 1500, 1500, 1500, 500, 1500, 1500, 1500, 1500, 500, 500, 1500, 1500, 1500, 1500, 500};
void TIM2_PWM()
{
RCC->APB1ENR |= 0x00000001; //Timer 2 clock is Enable
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN ; // I/O port A clock is Enable
RCC->AHBENR |= RCC_AHBENR_DMA1EN; // DMA1 clock enable
GPIOA->CRL = 0x0000000B; // Output Mode For PWM Pin is PA0
TIM2->ARR = 2000; //ARR VALUE IS 0 - 65535
TIM2->PSC = 72 - 1; //PERSCALER VALUE IS 0 - 65535
TIM2->CNT = 0; //Reset the current count
TIM2->CCMR1 |= 0x00000068; //Configure the pins as PWM
TIM2->CCER |= (TIM_CCER_CC1E | TIM_CCER_CC1P); //Capture/Compare 1 output enable & Capture/Compare 1 output polarity
TIM2->DIER |= TIM_DIER_CC1DE; //Capture/Compare 1 DMA request enable
TIM2->DIER |= TIM_DIER_UIE; //Update interrupt enable
NVIC_EnableIRQ(TIM2_IRQn); //Interrupt enable
TIM2->CR1 |= 0x00000001; //Enable counter
/********** TIM2_CHANNEL1 PWM with DMA1_CHANNEL_5 **********/
DMA1_Channel5->CPAR =(uint32_t)&TIM2->CCR1; // Configure the peripheral data register address
DMA1_Channel5->CMAR =(uint32_t)TIM2_CCR1_Value; // Configure the memory address
DMA1_Channel5->CNDTR = 25; // Number of data to transfer
/*** Data transfer direction, Memory increment mode, Circular mode ***/
DMA1_Channel5->CCR |= (DMA_CCR5_DIR | DMA_CCR5_MINC | DMA_CCR5_CIRC);
DMA1_Channel5->CCR |= (DMA_CCR5_MSIZE_0 | DMA_CCR5_PSIZE_0); // Memory size is 01: 16-bits & Peripheral size is 01: 16-bits
DMA1_Channel5->CCR |= DMA_CCR5_EN; // Enable DMA Channel 5
}
int main()
{
TIM2_PWM();
while(1)
{
}
}
void TIM2_IRQHandler(void)
{
TIM2->SR&= ~TIM_SR_UIF;
}I don't know where I made a mistake. help me.
Another take (created using https://wavedrom.com/ an impresive free online waveform "drawer"), maybe more illustrative ?
d, i, n, u, z -- UPdate event causes the value from buffer-CCR1
to be transferred into acting-CCR1
b, g, l -- if acting-CCR1>ARR, Compare (CC1) event is generated at UPdate
q, v -- if acting-CCR1<=ARR (as is usual), CC1 event is generated
when CNT==acting_CCR1
c, h, m, r, w -- DMA is set so that it is triggered by the CC1 event;
it takes some time until DMA fulfills the request by transferring data from
memory to buffer-CCR1, here we used as an example 5 timer-cycles
e, j, o, s, x -- DMA transfers value from buffer in RAM into buffer-CCR1
and increments the pointer into memory (DMA_MAR)
Note, that in the period between k and t there are two DMA transfers. This means,
that there's one less timer period than total DMA transfers, thus one less pulse
in the observed pulsetrain. The value 1500 from memory buffer position 8 (marked
as 1500 [1]) gets overwritten in the buffer-CCR1 by the next value (1500 [2])
before UPdate, i.e. it never contributes to pulse generation, so between
the 1200- and 500-pulse there are only two 1500-pulses, instead of three.
Remedy is simple, for PWM, perform the DMA-to-CCRx transfer upon UPdate event,
not upon the CCRx event. In that way, there's exactly one transfer per period.
CCRx buffering ensures that whatever the DMA transfer delay is, the new value
won't be used in this particular period, but in the next period (after the next
UPdate event transfers this value from buffer-CCRx into acting-CCR).
JW
