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SPI TXE flag set early

SebB
Associate II

Hi,
I m testing SPI TXE flag with the following code:

void TestSPI(void)
{
GPIO_ResetBits(GPIOA, GPIO_Pin_4);

SPI_I2S_SendData(SPI3, 0);
while (!SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_TXE));

SPI_I2S_SendData(SPI3, 0);
while (!SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_TXE));

GPIO_SetBits(GPIOA, GPIO_Pin_4);
}

The SPI is set to work with 16 bits.

Checking the pins on oscilloscope (see picture attached with yellow for GPIOA 4, blue for SCLK, purple for MOSI), you can see GPIOA pin 4 going high before the second half word is fully sent.

Would someone know why the second TXE flag is set while transmitting the second half-word?

Thank you.

1 ACCEPTED SOLUTION

Accepted Solutions

Because SPI is double-buffered (i.e. there's a holding buffer and the shift-register itself - you can look at the holding buffer as a 1-frame FIFO) and TXE indicates emptyness of the holding buffer, not the shift register.

JW

View solution in original post

5 REPLIES 5
SebB
Associate II

CS_early.jpg

Because SPI is double-buffered (i.e. there's a holding buffer and the shift-register itself - you can look at the holding buffer as a 1-frame FIFO) and TXE indicates emptyness of the holding buffer, not the shift register.

JW

KnarfB
Principal III

check the BSY busy flag instead.

hth

KnarfB

SebB
Associate II

Thank you waclawek.jan, KnarfB

Piranha
Chief II

TXE flag must be checked/waited before writing to the sending register, not after!