2023-07-17 06:36 AM
Hi,
I m testing SPI TXE flag with the following code:
void TestSPI(void)
{
GPIO_ResetBits(GPIOA, GPIO_Pin_4);
SPI_I2S_SendData(SPI3, 0);
while (!SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_TXE));
SPI_I2S_SendData(SPI3, 0);
while (!SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_TXE));
GPIO_SetBits(GPIOA, GPIO_Pin_4);
}
The SPI is set to work with 16 bits.
Checking the pins on oscilloscope (see picture attached with yellow for GPIOA 4, blue for SCLK, purple for MOSI), you can see GPIOA pin 4 going high before the second half word is fully sent.
Would someone know why the second TXE flag is set while transmitting the second half-word?
Thank you.
Solved! Go to Solution.
2023-07-17 08:39 AM
Because SPI is double-buffered (i.e. there's a holding buffer and the shift-register itself - you can look at the holding buffer as a 1-frame FIFO) and TXE indicates emptyness of the holding buffer, not the shift register.
JW
2023-07-17 06:40 AM
2023-07-17 08:39 AM
Because SPI is double-buffered (i.e. there's a holding buffer and the shift-register itself - you can look at the holding buffer as a 1-frame FIFO) and TXE indicates emptyness of the holding buffer, not the shift register.
JW
2023-07-17 11:01 AM
check the BSY busy flag instead.
hth
KnarfB
2023-07-18 02:03 AM
Thank you waclawek.jan, KnarfB
2023-07-19 05:06 PM - edited 2023-07-19 05:07 PM
TXE flag must be checked/waited before writing to the sending register, not after!