Placement of functions in CCMRAM

[DPavl.11]

Hello, i work with STM32F407ZG MCU, i need to place functions in RAM and CCMRAM sections. Placement of functions in RAM is correct, but they take longer than in flash. If I place functions in CCMRAM, then when I call the function, I get an error Hard Fault. I don't understand why functions take longer to execute in RAM than in flash, How to get rid of the error Hard Fault.

I Use STM32CubeIDE.

In ld-script:

/*--- New CCMRAM linker section definition ---*/
 _siccmram = LOADADDR(.ccmram);
 /* CCMRAM section */
 .ccmram :
 {
 . = ALIGN(4);
 _sccmram = .; /* define a global symbols at ccmram start */
 *(.ccmram)
 *(.ccmram*)
 . = ALIGN(4);
 _eccmram = .; /* define a global symbols at ccmram end */
 } >CCMRAM AT> FLASH
 /*--- End of CCMRAM linker section definition ---*/

Test func

__attribute__((section (".ccmram")))
void testFunc()
{
	int i;
	for (i = 0; i < 0xFF * 10; i++)
	{
		static int a = 0;
		a++;
 
	}
}

A function that copies data from flash to ram (i call it in main)

void CopyFlashToRamFunc(void) {
	extern const unsigned char  _siccmram;
	extern unsigned char _sccmram;
	extern unsigned char _eccmram;
	uint32_t *pSrc, *pDest;
	pSrc = & _siccmram;
	pDest = &_sccmram;
	if (pSrc != pDest) {
		while(pDest < &_eccmram)
		{
			*pDest++ = *pSrc++;
		}
	}
}

[Artur IWANICKI]

Hello.

Please refer to reference manual RM0090, figure1 on page 60:

https://www.st.com/resource/en/reference_manual/rm0090-stm32f405415-stm32f407417-stm32f427437-and-stm32f429439-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

CCMRAM in STM32F407 is connected to D-Bus thus it is not possible to execute code from it.

Both SRAM1 and SRAM2 are connected to S-Bus which gives less efficiency in terms of code fetching vs I-Bus (short notice on that in point 2.1.3 within mentioned reference manual).

[DPavl.11]

Thanks a lot for your help

[DPavl.11]

Are there ways to increase the speed of execution of functions like the method of placing from to SRAM (unfortunately, this does not work)

[waclawek.jan]

You *can* run from SRAM1/2. Besides, SRAM1 *can* be mapped to I+D bus, by mapping it at the area starting at address 0. And certain type of code can outperform FLASH, but not by much.

Usually there are no miraculous ways to speed up execution, usually you have to rethink and rewrite your code​. If you want, post your code for further discussion.

JW