On STM32F767 if the refernce voltage sags would it cause an error to the ADC?

[Raider E]

On STM32F767 if the reference voltage sags would it cause an error on the ADC?. I have multiple adcs running and configured with a circular DMA buffer. I get an intermittent error that shows up once in days and it seems to be a DMA transfer error. Two things I suspect might cause that error in my case but need confirmation from ST or anyone in the community.

1- datasheet says (page 164 of the datasheet) VDDA-Vref < 1.2. In my case because of HW error the vref drops to a low voltage which makes the diff between vdda and vref higher than 1.2V. would that cause an error to the adc which might manifest itself as a dma error

2- in circular mode, rather than allowing the dma to continue converting would start it and then stop it upon transfer complete interrupt on the dma (inside HAL_ADC_ConvCpltCallback() ). That start stopping works fine but looks like once in a while it might also cause an issue.

Anyone experienced one of the two conditions above or have a suggestion please comment.

Thanks

[waclawek.jan]

> it seems to be a DMA transfer error

What do you exactly mean by "DMA transfer error"? What exactly are the symptoms?

> diff between vdda and vref higher than 1.2V. would that cause an error to the adc which might manifest itself as a dma error

It may quite well be that a larger voltage difference impacts the digital part of the IC. Anything may happen, then.

> start it and then stop it upon transfer complete interrupt on the dma

You mean stop and then start? Consider, what happens when you stop the DMA late, i.e. after the "circularity" already picked a new sample from the ADC. It depends much on how exactly you start the DMA again - if you (and by that I mean any code used, any "library" being now part of your code thus your responsibility) follow the procedure outlined in the RM for DMA stop/start, and if there's no flaw in your own logic (e.g. in how you calculate the space needed for the transfer, how does that one extra sample impact other parts of the code), then there should be no issue.

JW

[Raider E]

The symptom is transfer complete interrupt from the DMA stops firing and thus a freeze of voltage readings on one ADC. Faulty readings on other ADCs from that point onward and eventually May freeze. The symptoms only shows up after few days. Not sure what’s the error but most likely caused by either a continuous stop (upon a DMA transfer complete ISR ) copy contents of the DMA and start DMA again in circular mode which is not the norm. That workaround was needed to lower the voltage drop on the Vref (switch off some adcs and their DMA to reduce the switching currents on Vref and reduce voltage drop on Vref to get more accurate readings of boltage channels ). ST HAL also seems to have a flaw that if you happen to stop the DMA in any HAL state other than “busy�? it goes into unrecoverable error mode for good.

[waclawek.jan]

Do you handle ADC overruns, as outlined in Using the DMA subchapter of ADC chapter in RM?

JW