MISO line tri-state issue for STM32H573AII3Q

[madhu1]

Hello,

We are using STM32H573AII3Q in our application. One external IC is interfaced with this uC through SPI lines. 

We are observing a tristate on MISO line. To investigate we isolated the uC and checked the MISO line. It is having a voltage level of around 0.4V. Ideally it should be pulled up as we have connected 46.4k pullup resistor on MISO line.

SPI MISO signal image when external IC is isolated from uC.

Just want to know how we can resolve this tri-stating issue? 

Thanks

Madhurani

[waclawek.jan]

Is STM32 master or slave?

If it's master, MISO is input, i.e. STM32 does not drive MISO pin and it's the external circuit which should drive it, if selected.

JW

[madhu1]

Hello,

Thanks for your reply. STM32 is a master. What is the default state of STM32 MISO pin? 

I believe the tri-state is happening from uC side only. Because when we isolate th uC and check the MISO line, it is showing 0.4V.

[waclawek.jan]

> What is the default state of STM32 MISO pin?

There is no such thing as "STM32 MISO pin". There are several SPIs and several MISO pins on any STM32. Which pin are you talking about?

What do you mean by "default state", state during/after reset?

Most pins are set to Analog mode, i.e. they are high-impedance; there are exceptions. Read the GPIO chapter in Reference Manual (RM).

What hardware is this, your own of a board like Nucleo or Disco? In the latter case, check the schematics of the board to find out if given pin is connected to some other on-board circuitry or not.

JW

[Billy OWEN]

Hi @madhu1 

This post has been escalated to the ST Online Support Team for additional assistance.  We'll contact you directly.

Regards,

Billy

[madhu1]

Hello,

Thanks for escalating this issue for additional assistance. Ideally in how many days we should expect a response?

Thanks

Madhurani