Is HARDWARE NSS PULSE possible for SPI_TIMODE or MOTOROLA MODE master connected with a single slave device using DMA in STM32F407VG

[RK.1]

I have currently configured the SPI in the following configuration

 hspi1.Instance = SPI1;

 hspi1.Init.Mode = SPI_MODE_MASTER;

 hspi1.Init.Direction = SPI_DIRECTION_2LINES;

 hspi1.Init.DataSize = SPI_DATASIZE_16BIT;

 hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;

 hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;

 hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT;

 hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;

 hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;

 hspi1.Init.TIMode = SPI_TIMODE_ENABLE;

 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;

 hspi1.Init.CRCPolynomial = 10;

my DMA settings are as follows

 hdma_spi1_tx.Instance = DMA2_Stream3;

  hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3;

  hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;

  hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;

  hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;

  hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;

  hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;

  hdma_spi1_tx.Init.Mode = DMA_NORMAL;

  hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;

  hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;

  hdma_spi1_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL;

  hdma_spi1_tx.Init.MemBurst = DMA_MBURST_SINGLE;

  hdma_spi1_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;

  /* SPI1_RX Init */

  hdma_spi1_rx.Instance = DMA2_Stream0;

  hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3;

  hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;

  hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;

  hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;

  hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;

  hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;

  hdma_spi1_rx.Init.Mode = DMA_NORMAL;

  hdma_spi1_rx.Init.Priority = DMA_PRIORITY_LOW;

  hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;

  hdma_spi1_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL;

  hdma_spi1_rx.Init.MemBurst = DMA_MBURST_SINGLE;

  hdma_spi1_rx.Init.PeriphBurst = DMA_PBURST_SINGLE;

There is a vague indication using timing diagram that NSS pulse output will be controlled by the SPI driver in TI Master mode

[Figure 252 pg no 884 .Reference manual

STM32F405/415, STM32F407/417, STM32F427/437 and

STM32F429/439 advanced Arm®-based 32-bit MCUs]

My SPI peripheral needs a NSS high pulse for Indicating end of frame.

Is there anything i should look into to enable NSS pulse mode so that i can use a DMA where the SPI driver triggers a NSS Pulse by itself between each frames

[waclawek.jan]

No, "NSS pulse" is available only in newer STM32 models.

As a workaround, you can use a timer to generate the NSS pulse, and use that time to trigger DMA instead of SPI Tx to load the SPI_DR.

JW