Interfacing Nucleo F767ZI Board with W25Q256JV using QSPI

[NajeebUllahKhan]

Hi Everyone,

I interfaced Nucleo F767ZI with W25Q256JV using SPI and everything was working fine. But due to time and speed requirements, now I have to shift it to QSPI. I have used example code of STM Document named "QSPI_F769_discovery_flashloader" and developed a code for QSPI. But whenever I try to run the code and write/read the memory, nothing happens. I started to run code in debug on STMCube IDE and found that when try to send command to enable write and read status register, the register value doesn't change to write enable (0x02).

Always fail here and Error LED turns ON.

if (HAL_QSPI_AutoPolling(&hqspi, &sCommand, &sConfig, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET);
return QSPI_ERROR;
}

The Write Enable function is here.

uint8_t QSPI_WriteEnable(void) {

QSPI_CommandTypeDef sCommand;

QSPI_AutoPollingTypeDef sConfig;



memset(&sCommand, 0, sizeof(sCommand));

memset(&sConfig, 0, sizeof(sConfig));



/* Enable write operations ------------------------------------------ */

sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;

sCommand.Instruction = WRITE_ENABLE_CMD;

sCommand.AddressMode = QSPI_ADDRESS_NONE;

sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;

sCommand.DataMode = QSPI_DATA_NONE;

sCommand.DummyCycles = 0;

sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;

sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;

sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;



if (HAL_QSPI_Command(&hqspi, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE)

!= HAL_OK) {

return QSPI_ERROR;

}



/* Configure automatic polling mode to wait for write enabling ---- */

sConfig.Match = 0x02;

sConfig.Mask = 0x02;

sConfig.MatchMode = QSPI_MATCH_MODE_AND;

sConfig.StatusBytesSize = 1;

sConfig.Interval = 0x10;

sConfig.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;

sCommand.Instruction = READ_STATUS_REG_CMD;

sCommand.DataMode = QSPI_DATA_1_LINE;



if (HAL_QSPI_AutoPolling(&hqspi, &sCommand, &sConfig,

HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {

HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET);

return QSPI_ERROR;

}

return QSPI_OK;

}

Below is my attached qspi.h and qspi.c files and CubeMX configuration.

 

Kindly help me, what is the problem and if possible provide me a .c .h file for QSPI it's urgent.

Looking forward to suitable response, thanks in advance.

[Tesla DeLorean]

I tend to use PB6 rather than PB10 on NUCLEO-144 platforms, but should work, not sure if there are other nodes/stubs on that, or one vs the other.

>16MB would typically need to use the 4-byte (32-bit) addressing mode, rather than 3-byte (24-bit)

So W25Q256 code might not work on W25Q128 parts.

Could try this as an External Loader in STM32 Cube Programmer to test/check implementation

https://github.com/cturvey/stm32extldr/blob/main/h7_w25q256/CLIVEONE-W25Q256_STM32H7XX-PB2-PB10-PD11-PD12-PE2-PD13.stldr