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[CactusPete]

O

[TDK]

You can trigger the DAC with CH1 and the ADC with CH2 of the same timer. HRTIM not needed. Perfectly in sync (and if not, timing can be adjusted with 10ns or so precision).

[CactusPete]

delete

[TDK]

> If one timer can start two DMA transfers with a delta time I cannot see how this can be done.

If (for example) CH1 and CH2 trigger the ADC and DAC, respectively, set CCR1 and CCR2 based on the delay you want. This is the "Pulse" value in CubeMX.

ADC setup:

DAC setup (send data to DAC->DR on CH2 event):

Not sure if all of this is clickable in CubeMX but a lot of it is. I'd recommend getting each piece working separately, then combine.

[CactusPete]

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[CactusPete]

d

[CactusPete]

d

[TDK]

The following code/project does a burst of 1000 synchronized ADC+DAC samples at 1ms increments using HAL using TIM1. One is triggered on update event, the other on CC1 event, so change the channel 1 pulse value to change the time between them.

// global variables
#define CAPACITY 1000
volatile uint16_t gDacBuffer[CAPACITY];
volatile uint16_t gAdcBuffer[CAPACITY];

...

  // code to start samples
  if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)gAdcBuffer, CAPACITY) != HAL_OK) {
      Error_Handler();
  }
  if (HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1, (uint32_t*)gDacBuffer, CAPACITY, DAC_ALIGN_12B_R) != HAL_OK) {
      Error_Handler();
  }
  if (HAL_TIM_Base_Start(&htim1) != HAL_OK) {
      Error_Handler();
  }

[CactusPete]

d

[TDK]

Peter,

I went back to my project and changed the timer so that it had an update rate of 10 Hz, then I changed the CH1 pulse to be half of ARR and changed the capacity to 5. I then looked at the tick (HAL_GetTick()) to see how many ticks elapsed until each change in the DMA NDTR register, which marks when the data was received from ADC or sent to DAC. We should see 100 ticks between updates and they should be offset by 50, and that is exactly what we see:

This shows the code is doing what you want--ADC and DAC are converted with a delay with respect to each other, with DAC being converted 50 ms before the ADC.

I then changed pulse to be 20% of ARR. Results are as expected:

I know it's frustrating, but unfortunately with code you do usually need to get it 100% correct or it doesn't work. Consider using the provided example exactly until you have it up and running. You may need to do some minor translating of the IOC settings to your chip. You do not need to start the timer channel.

There are many other ways to set this up, but this is one that works.