2016-08-18 03:01 AM
Hi All,
I have two signal, one high signal having 20% duty cycle and a low signal with 40% duty cycle. High signal is synchronized to low signal with reset trigger. I want to insert a delay of 100-400ns (t2 in diagram) before high signal so it looks like as in attached diagram. I tried to synchronized complementery pwm with dead time insertion but no success.
How can I insert such a delay? please let me know. Thanks! #stm32-pwm-timers #delay
2016-08-22 09:21 AM
Hi kumar.nitin.002,
Yes, you should insert a dead-time on complementary output signals OCx and OCxN of the same timer TIMx . There is no synchnoization to be done here. Just apply the same code of the ''TIM_complymebtarySignals'' example on the at this path: STM32Cube_FW_F3_V1.6.0\Projects\STM32F3-Discovery\Examples\TIM\TIM_ComplementarySignals You will have the OCx as the low signal (falling) and the complimentary high ignal (rising) with a delay. (in the example delay is : 100/SystemCoreClock (around 1.4us) ) -Hannibal-