Hi All.
So, I'm currently working on a project that I need some assistance with...
I'm using the HRTimer and ADC. Timer A and Timer E both control my gate drive outputs; they're variable frequency. I also have Timer F, which controls my ADC sampling. Timer F runs at a much higher frequency than the Master timer, 10 times, roughly. This way, there are 10 equally spaces samples from my incoming signal that I can analyze for every period of the master timer. My incoming signal is of the same exact frequency as my outputs, just phase shifted by some degree. The ADC samples are put into an array by DMA, circular style.
I'm creating a small array of 10 samples containing a reference sine, and cosine waveform. This is effectively my "window", which, for every 500 samples I collect (technically 1000, ping pong buffer style) I multiply my input waveform by the sine and cosine waveforms sample by sample, taking care to roll over every 10 samples for my sine and cosine tables. I then add the results up, average them, and use atan2f to get my phase; basic I Q demodulation.
Simplifying it, I'm "making" my Master Timer waveform effectively into a sine and cosine waveform, and then attempting to use that to see how much my resulting incoming signal is phase shifted. Problem is keeping everything synchronized together, since, the ADC samples *need* to be taken at the same exact reference point in time, otherwise my "window" shifts, and my phase measurement gets all messed up.
I'm using the Master Timer for synchronization. Every time it rolls over, it resets itself, Timer A, Timer E, and Timer F. Only the Master Timer has the ability to register update the other timers and itself.
This *should* synchronize them, and for the most part, it does. If I change the output frequency lower, it's fine. But, if I adjust it higher, and then reduce it, then it seems like my effective ADC window shifts, and I can't figure out why. All of my timer register changes are done on a callback loop, which itself is triggered by a standard timer on a 5 khz clock.
I turn off Timer Register updates while I'm adjusting the timer register values, and then once completed, I perform a software update of the registers, ensuring all timers are changed at the same time... theoretically.
If I could figure out how to make Timer F start synchronously with the Master Timer, while the Master Timer is already running, that would help I think. That, and/or if there was some way to manually change the DMA to restart from the zero position on command, would probably fix my problem...
Any ideas?... I know this is a lot of text so I apologize. It's hard explaining the entire program at once.
I appreciate any help anyone can give me.
Thank you!
