How does VREFBUF HIZ bit get set via CUBEIDE?

[KHarb.1]

I have a project where VREFBUF outputs 2.0xxV correctly without intervention. I created a new project and I see VREFBUF output stuck at 0V, and I'm not sure what's causing the changed behavior.  I inspected the VREFBUF_CSR register and I see ENVR=1 and HIZ=1. When I set HIZ=0 via StLink, I see the VREFBUF output pop to the correct value. I don’t see CubeIDE options to set this explicitly, but it appears there is some setting that manipulates this value. What should I look at?

I tried adding both of the below lines to set the HIZ bit in user code, but it didn’t appear to change the HIZ bit when I checked via StLink. What could I be doing wrong?

VREFBUF->CSR&=0b11101;

HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);

I'm also seeing DAC output drop to zero when the HIZ bit is set. Is this normal or a potential clue?

[Melc_dB]

Hello @KHarb.1,

First, make the difference between Vref+ and VREFBUF: see this page for better explanation

• VREF+ is the pin on the package linked to VREF 
• VREFBUF is the internal reference that can provide reference voltage to VREF+

So when you talk about "VREFBUF outputs" I assume that you means VREF+.

"HIZ" bit defines if VREF+ output is high impedance or low impedance. 

 

If you want to output VREFBUF voltage to provide reference externally you must set HIZ = 0 and ENVR = 1.

Hope that answers your questions,

Best regards,

Melchior 

[KHarb.1]

Yes, I'm aware of all that. I'm concerned with differing behavior and the need for the manual step of setting HIZ =0. I have a previous project and config code that works just fine without that step. I'm trying to isolate what in HAL\CUBE code is setting HIZ=1.  There are no explicit settings for it that I can see in CUBE, so I'm left to guess what peripheral initiation is causing the setting to change.

[Melc_dB]

all right, I misunderstood your question,

From my side I managed to change HIZ bit by changing the configuration of VREFBUF in CUBEMX. The HIZ bit value matches the configuration name on the table I sent earlier.

In the code itself the bit is set in the file stm32XXxx_hal_msp.c : (example VREFBUF in hold mode)

void HAL_MspInit(void)
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  /* System interrupt init*/

  /** Enable the VREF clock
  */
  __HAL_RCC_VREF_CLK_ENABLE();

  /** Enable the Internal Voltage Reference buffer
  */
  HAL_SYSCFG_EnableVREFBUF();

  /** Configure the internal voltage reference buffer high impedance mode
  */
  HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE);

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}

Best regards,

Melchior

[KHarb.1 · Accepted solution]

I see that line in my code, so I know that's fine. Further research linked this issue to a raft of strange behaviors I've documented in the post below.  It seems the HIZ and ENVR bits are being changed by a potential fault mode that I don't understand yet.

https://community.st.com/t5/stm32-mcus-products/can-electrical-issues-with-st-link-pcb-force-vrefbuf-envr-and/td-p/685015