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Help with i2s configuration

silent
Associate II
Posted on April 02, 2014 at 12:05

hello everyone

i have adc ad1877, configured as in picture

0690X000006056mQAA.png

How i should configure i2s in stm32f4 ? I have tried this one 

  I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_32k;

  I2S_InitStructure.I2S_Standard = I2S_Standard_PCMShort;

  I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Enable;

  I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low;

  I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_32b;

  I2S_InitStructure.I2S_Mode = I2S_Mode_MasterRx;

also tried few others configurations but with no luck.

Sometimes if i manually reset few times adc it works. Maybe it must be special logic of reseting this adc?

#i2s #stm32 #dma
14 REPLIES 14
frankmeyer9
Associate II
Posted on April 04, 2014 at 15:48

Perhaps you have just locked out yourself.

Check the relevant supply voltages on the board, and if o.k., try a mass erase with the Flash Loader Demonstrator, after booting it into system bootloader.

There are several threads about this procedure here ...

silent
Associate II
Posted on April 05, 2014 at 11:29

Whatever...

In adc datasheet says that reset pulse should be made synchronous to clkin (mcko) . How to make it? By using some interrupt or what?
frankmeyer9
Associate II
Posted on April 05, 2014 at 17:32

In adc datasheet says that reset pulse should be made synchronous to clkin (mcko)

 

Not really.

It says you should do this if you have more than one ADCs and want them all to leave the reset state at the same time.

However, I still can't understand the fuzz about a 28-pin, 5V device.

Perhaps the signal levels (3.3V <--> 5V) are part of your problems ...

silent
Associate II
Posted on April 06, 2014 at 08:30

Maybe, next time i'll try ad1871, it has independent power supply for i/o which can be powered from 3 volts

frankmeyer9
Associate II
Posted on April 06, 2014 at 15:19

Seriously, I would consider this 3.3V/5V difference as possible source of your problems.

While the STM32 pins might be 5V tolerant and even read signals correctly, the output signals to the ADC might not reach the L/H theshold. That is a perfect recipe for spurious trouble misbehavior of the ext. device, and lots of new grey hairs.

Consider level shifting circuitry, or rather another ADC.