H743 FDCAN - Data Time Segments ignored?

[Smoun.1]

Hello,

I am trying to setup CAN FD between 2 Nucleo H743ZI2 to transmit data at a relatively high speed (shooting for 4 Mbps), however, I am experiencing issues getting the data part of the frame to use its own timings.

I set FD CAN and normal mode, tried with and without bitrate switshing.

I have a CAN clock of 40 MHz, and nominal timings to reach 1 Mbps and a sample point of 87.5%.

My data timings are set to have 4 Mbps and a sample point of 87.5% as well.

I have attached CubeMX screenshots of the configuration.

Looking at the signal on the oscilloscope, it is decoding the entire test frame with 8 bytes of data being sent with a 1Mbps baudrate and 87.5% sample point. The data displayed on the oscilloscope is exactly what I have in my test code - no problem there, only a problem of timing it looks like. It looks like the flexible bit rate for the data is not being applied correctly.

Note: changing seg 1/2 timings on the data part has no impact on the actual signal, seems like those settings are basically ignored currently.

Is there anything obvious I am missing in my configuration?

Thank you!

[Smoun.1]

Any of you have been able to set a different speed for negotiation and actual data? If so, is there a trick with the config? limitation on prescalers?

[RallyTronics]

Did you set the BitRateSwitch in the FDCAN_TxHeaderTypeDef tx header? I am struggling to get CAN FD to work as well. Everything works fine if I turn off bit rate switching but once I turn it on I get bus errors. This indicates that it is changing something when BRS is active.

uint32_t BitRateSwitch; /*!< Specifies whether the Tx frame will be transmitted with or without

bit rate switching.

This parameter can be a value of @ref FDCAN_bit_rate_switching */

[BSpoe.1]

The problem with BRS is that you need to add a transceiver delay, because a higher TX data rate causes an error on the RX pin of the peripheral.

So try to call the following functions to enable this feature:

/* Configure and enable Tx Delay Compensation : TdcOffset = DataTimeSeg1*DataPrescaler */
HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan1, DataTimeSeg1*DataPrescaler, 0);
HAL_FDCAN_EnableTxDelayCompensation(&hfdcan1);

 This feature is essential above 2Mbps in data rate.

[BSpoe.1]

The timings for SEG 1 and 2 specify the sample point of the bit. It's not important for sending some data, just when you receive something. There is no change in the oscilloskope view, because the peripheral interprets just the bits depending on the clock.

I recommend to set the SYNC_JUMP_WIDTH on the same value like the SEG2 value. This settings works fine for me with up to 8Mbps.

Please check if your MX initialization is configured correctly. Maybe the BRS is not set.

You will get the best results and the maximum possible speeds with FDCAN with a peripheral clock of 80 MHz and a prescaler of 1.