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GPIO control while reading SPI

hjuns
Associate III

Hello,

I use STM32F767II, CubeIDE, HAL driver.

I want to use GPIO control while reading SPI.

I use SPI Master.

SPI Master reading operate MISO after MOSI operation.

0693W00000LvveVQAR.png

GPIO ON when MOSI state.

GPIO OFF when MISO state.

How can i control GPIO when use SPI.

Thanks for reading my question.

1 ACCEPTED SOLUTION

Accepted Solutions
Danish1
Lead II

I think there's a misunderstanding here.

Normal SPI is bidirectional. MOSI and MISO are separate wires, and the master can be sending out one byte on MOSI at the same time as another byte is being received on MISO.

A complication is that the slave won't know what to put onto MISO until it has received the full byte from MOSI, so replies by the slave on MISO tend to happen on the byte after the command was sent on MOSI.

There is no MOSI or MISO "state" in normal 4-wire SPI. But there might be a chip that, for whatever reason, uses the same pin for MOSI and MISO. If you think you have to interface your stm32 with one, do share a link to its part-number so we can check the data-sheet. You might be forced to use register-level access to the SPI peripheral of your stm32 rather than going through HAL or a higher-level library for the simple reason that the writers of those libraries didn't include such fine control. You might have to set SPI_CR1_BIDIMODE to 1 in SPIx->CR1, then change the state of SPI_CR1_BIDIOI at the appropriate time in the transmission sequence, when SPI_SR_BSY is clear in SPIx->SR. Which probably means you can't do the transfer by DMA, only by interrupt or direct control from your main program.

Hope this helps,

Danish

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2 REPLIES 2
Danish1
Lead II

I think there's a misunderstanding here.

Normal SPI is bidirectional. MOSI and MISO are separate wires, and the master can be sending out one byte on MOSI at the same time as another byte is being received on MISO.

A complication is that the slave won't know what to put onto MISO until it has received the full byte from MOSI, so replies by the slave on MISO tend to happen on the byte after the command was sent on MOSI.

There is no MOSI or MISO "state" in normal 4-wire SPI. But there might be a chip that, for whatever reason, uses the same pin for MOSI and MISO. If you think you have to interface your stm32 with one, do share a link to its part-number so we can check the data-sheet. You might be forced to use register-level access to the SPI peripheral of your stm32 rather than going through HAL or a higher-level library for the simple reason that the writers of those libraries didn't include such fine control. You might have to set SPI_CR1_BIDIMODE to 1 in SPIx->CR1, then change the state of SPI_CR1_BIDIOI at the appropriate time in the transmission sequence, when SPI_SR_BSY is clear in SPIx->SR. Which probably means you can't do the transfer by DMA, only by interrupt or direct control from your main program.

Hope this helps,

Danish

you all right.

I misunderstanding SPI process.

I'll try the register control method you suggested.

thank you for your answer. 😀