Get timer value (duty cycle) when OCxRef-clear (OCREF_CLR) was activated by the comparator

[Gustavo.Laureano]

Hi,

I am using the OCxRef-clear + comparator to do cycle-by-cycle current regulation and it is working as intended, limiting the delivered duty-cycle despite the value set in software, but I also need to know in software if this is happening and know the real duty cycle delivered to the load, how can I do this?

My first thought was to set another channel of the same timer as input compare and link it to the same comparator output, but none of the other channels of this timer are linked to the comparator, so I thought in 3 other possible ways, each one of them not ideal for a reason:

• Enable comparator interrupt and get the timer value by software, but this would not work properly as it depends on the interrupt latency and priority
• Connect the comparator GPIO output to the IC GPIO input, but this solution is ugly and is prone to hardware failure
• Run a second timer in parallel synced with the first timer (seems to be possible thru timer sync mechanisms) and use its IC channel linked to the comparator output (can I do this? link the comparator to more than one timer?), but this solution does not seems ideal as this second timer cannot run at the same clock frequency of the first one (the first one is running at 128MHz, 2x the main clock frequency), so it would be impossible to get acurate values at higher PWM frequencies

More information about my setup:

• STM32FG071KB
• Running the core @64MHz and the TIM1 @128MHz
• Using TIM1 Channel 1 for PWM generation (now @ 20KHz, but it will probably change), with complementary output & dead time
• Using COMP1 for cycle-by-cycle current control, linked to the OCREF_CLR
• Using COMP2 for another feature (asking about it @ this thread: https://community.st.com/s/question/0D50X0000AlcqWASQY/using-the-comparator-break-input-to-control-the-complementary-output-in-the-advanced-control-timer)

So, I would like to ask for sugestions and other possible ways of getting the real duty-cycle value, is there any other solution?

Thanks!

[waclawek.jan · Accepted solution]

Use a different channel for the output than CH1, then you can connect COMP1 to CH1 input in TIM1_TISEL.TI1SEL and use that to capture the counter at the COMP1 edge.

You probably could do the measurement with a different timer, too, but if you are clocking TIM1 from the PLL, there would be issues around synchronicity, unnecessarily complex.

JW

[Gustavo.Laureano]

I thought about this too, but it's not possible to change the PWM channel as only Channel 1 can be cleared by the OCREF_CLR and have the complementary output

[waclawek.jan]

> only Channel 1 can be cleared by the OCREF_CLR and have the complementary output

Why would that be so? CHannels 1 to 3 have complementary outputs, and there's an OCxCE bit in TIM1_CCMRy for all 6 channels.

JW

[Gustavo.Laureano]

Thank you Jan, you are right!

I was looking for these possibilities in CubeMX, and Channel 3 wasn't being listed as an option because it was not enabled, now I changed it and everything is working as intended, with channel 3 generating the waveform and channel 1 as input compare!

Next time I will look better at the reference manual