FOR STM32H750 QUADSPI, the two banks can work independently?

[yyong]

FOR STM32H750 QUADSPI, the two banks can work independently? can I use bank1 with a nor flash for XIP, bank2 with a nand flash for data?

[Tesla DeLorean]

My interpretation of the docs says NO.

The Dual bank interleaves two identical devices, or dual die packages, to increase bandwidth/throughput.

Suggest you ask your FAE

[Andreas Bolsch]

Not simultaneously: XIP implies memory mapped mode, and this mode requires both devices to have same capacity, same command for read, same number of dummy clocks *AND* a linear address space ...

Of course it's possible to use these alternatingly, as you can select whether to use flash 1 only, flash 2 only and both. But to access the data in NAND flash, you would have to use code in the *internal* flash only and reconfigure the QuadSPI each time, that's probably not what you want to do.

BTW It does hardly make any sense to use memory mapped mode for a NAND flash, as those don't have a linear address space but row/column with column sizes not a power of two (or you have to sacrifice the spare area). Indirect read/write is no problem, of course.

[Imen.D]

Hello,

It is not possible to use two banks independently.

As alternatif, we suggest to use SDMMC with an emmc for data storage.

PS: Please, try to put a summary in "Question" field then details in the body.

I edited your question putting a title that you may change if you want.

Kind Regards,

Imen