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errata: your ADC sample time in both the User Manual and CubeMx is wrong/misleading

Gabriel Staples
Associate II

I'm using STM32CubeMX 5.3.0, and RM0410 Rev 4.

RM p450 says

T_conv = Sampling time + 12 cycles.

This is wrong/misleading. Actually, this is the truth:

T_conv_total = Sampling time + T_conv_at_a_given_resolution,

The converstion times at a given resolution are described under Section 15.7: Fast conversion mode. They are:

T_conv_at_a_given_resolution:

12 bits --> 12 clock cycles

10 bites --> 10 clock cycles

8 bites --> 8 clock cycles

6 bits --> 6 clock cycles

Notice the pattern here: 1 clock cycle per bit of resolution.

Please fix RM p450 to clarify this.

RM p452 (15.7 Fast conversion mode) is also wrong/misleading.

It says that 12 bits takes 3 + 12 = 15 ADCCLK cycles. What is misleading is the 3. This is only if you have 3 set as your sample time! (see registers p473-474 for the sample times you can choose).

So, instead of RM p452 having this table ONLY:

• 12 bits: 3 + 12 = 15 ADCCLK cycles

• 10 bits: 3 + 10 = 13 ADCCLK cycles

• 8 bits: 3 + 8 = 11 ADCCLK cycles

• 6 bits: 3 + 6 = 9 ADCCLK cycles

It should have this table FIRST, followed by the above table, and with clarity added that the above table is for a sample time of 3 clock cycles.

• 12 bits: sampling_time + 12 ADCCLK cycles

• 10 bits: sampling_time + 10 ADCCLK cycles

• 8 bits: sampling_time + 8 ADCCLK cycles

• 6 bits: sampling_time + 6 ADCCLK cycles

STM32CubeMX propagates this erroneous and misleading information, as shown here:

0690X0000098KKxQAM.png

It shows, for example: "12 bits (15 ADC Clock cycles)", which as I have just shown is MISLEADING. It should instead say, "12 bits (12 clock cycles + user-selected Sampling Time)", which makes a whole lot more sense and adds much clarity.

Here's some more screenshots to support what I'm saying.

From RM0410 450:

0690X0000098KL2QAM.png

and p452:

0690X0000098KL7QAM.png

and p473:

0690X0000098KLCQA2.png

In short, please fix RM p450 and 452, and the CubeMx menu.

I suspect all other Reference Manuals for all other chips are affected similarly, so please look into all chips you make. Thanks.

Related:

Here's an answer I wrote about ADC sample time. That answer cross-links back to this post: https://electronics.stackexchange.com/questions/311326/stm32f20x-adc-sampling-time-rate/452200#452200.

2 REPLIES 2
Gabriel Staples
Associate II

Bump. ST have you seen this?

eduardo_reis
Associate III

Thank you for this post. I got here from the cross-reference link. I am very new to micro-controllers programming and architecture and I have notice an extra `/2` escaler on the RM of my device. Does that mean that the prescaler shown in STM32 is still to be multiplied by `/2`?

Screenshot from 2024-01-20 10-05-23.png