Hello,
I'm trying to debug an issue I'm having with the GPDMA on an STMu5.
I believe I'm mostly there but for some reasons I'm missing only some DMA triggers.
So the situation is as follows:
I'm trying to read the IDR register of a GPIO port into memory using DMA that is sync to the rising edge of a PWM timer. Here is the situation:
In white is the PWM signal and the last 4 channels are the GPIOs I'm trying to read.
I have configured my DMA as follows:
The trigger event Selection of the TIM15 is OC1REF.
So like I said I believe I'm mostly there, here is a snippet of the DMA buffer:
And here are the corresponding signals:
so first of all DMA_buffer[0] is: 1000000100, the value that im looking for is GPIO 1 to 4 so the value is 0100 which correspond to the second rising edge of the clock. I have shown the buffer values to the signal in the picture of the logic analyser. DMA_buffer[1] is 1000. which is also good if we follow the logic analyser and finally DMA_buffer[2] is 0010. The LSB being the orange signal.
The problem seems to be always on the first DMA transfer (The Red rectangles in the picture). It seems each multiple of 4 DMA triggers is wrong or not even sent.
My goal would be to read 20000 times the GPIOs only on the rising edge of the PWM signals. Currently, I start a simple DMA transfer with the HAL function: HAL_DMA_Start. My understanding is that since I have setup the DMA transfer to be on the tim15_TRGO and that tim15 TRGO is mapped to oc1_ref. Each time I have a rising edge on tim15 the DMA should initiate a transfer. I have my DMA setup as a burst of 1 half-word (16 bits IDR register of the GPIO).
The tim15 is configure in one pulse mode to generate the 4 clock cycle.
The values in DMA_buffer seems to be good for every signal except every fourth. I believe it's a simple issue with the configuration and a missunderstanding of the interactions of the DMA and timer. Could anyone help me better my understanding?
