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Can an MCU that supports QSPI use OCTOSPI memories?

shffhsdfhse
Associate III

I want to add some volatile memory to my MCU (32~64 MB). I'm currently looking at STM32H/F7 devices.

Most DRAM needs so many traces that the PCB area taken up by the memory makes it impractical for my design.

It seems like there is a new memory interface called HyperBus, which is the same (?) as OCTOSPI. This interface uses much less pins and board area than a traditional DRAM.

Does anyone know if a QuadSPI peripheral in dual mode would be able to read/write to such a memory? I saw that the newer STM32HB0 line will support OCTOSPI, so this makes me think that QSPI won't work.

I'll mostly be using the memory for buffering, so it doesn't need to be fast enough for executing code at full speed.

1 ACCEPTED SOLUTION

Accepted Solutions
Andreas Bolsch
Lead II

Hyperbus uses 8 data lines and RWDS (data strobe), so can't be used with QSPI at all. There are (Q)SPI RAMs which could be used with QSPI, however writing would be possible in indirect write mode only but not in memory mapped mode. Both read and write is possible for such a (Q)SPI RAM with OCTOSPI.

But keep in mind that RAM in its literal meaning is not feasible with a serial protocol. For typical random access, the penalty for transmitting the address (three or four bytes) for each byte/word of data is prohibitively expensive. Large bursts are ok.

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3 REPLIES 3
Andreas Bolsch
Lead II

Hyperbus uses 8 data lines and RWDS (data strobe), so can't be used with QSPI at all. There are (Q)SPI RAMs which could be used with QSPI, however writing would be possible in indirect write mode only but not in memory mapped mode. Both read and write is possible for such a (Q)SPI RAM with OCTOSPI.

But keep in mind that RAM in its literal meaning is not feasible with a serial protocol. For typical random access, the penalty for transmitting the address (three or four bytes) for each byte/word of data is prohibitively expensive. Large bursts are ok.

shffhsdfhse
Associate III

Thanks for that answer; you saved me a lot of time! I tried looking for some QSPI volatile memories, but they seem to all be really small and mostly non-stocked.

Alex - APMemory
Senior II

Hi,

If you are using an STM32 MCU version which support QSPI SDR, QSPI DDR and OPI DDR PSRAM interface (such as STM32 L4+, L5, H7A33/B3/B0, H72x/3x, ...), you can get a wide range of memory solution with lowest pin count and power. FYI, QSPI is starting from 2MB (APS1604M-SQR...) and OPI from 8MB up to 64MB (for example APS51208N-OBR-BD) with full functionality support. This solution will help to reduce your PCB trace concern, and eventually upon need can also be available in very small WLCSP package.

Alex

PS: for MCU version not supporting QSPI/OPI RAM, the quad NOR controller doesn't support memory mapped write, so recommendation would be to use FMC controller with ADMUX PSRAM or SDRAM.