2024-06-26 10:08 PM
Hello,
I am trying to find available solutions for below requirement.
I am using STM32H743 MCU in a design and I want to add external SRAM of 128Mbytes to the design.
I understand can do this with FMC, but the problem is available pins for the FMC are conflicting with the requirements of the other peripherals.
I read the documents and found that there is a possibility of extending the RAM with Quad-SPI, but it is not clear to me when it says, "Can't be written to the memory when it is configured memory-mapped code execution mode".
I am open to study available options, it would be appreciated, if anyone can suggest any options, share their experience with a similar situation.
Thanks
Solved! Go to Solution.
2024-06-27 06:20 AM
Hello @Blk81 and welcome to the Community :),
For the QUADSPI interface, in memory-mapped mode, the external flash memory is seen as an internal memory but with some latency during accesses. Only read operations are allowed to the external flash memory in this mode. as mentioned in RM0433 section 23.3.12 QUADSPI use.
The indirect mode mode support read and write operations.
For more information I advise you to take a look at Quad-SPI interface on STM32 microcontrollers and microprocessors - Application note
For the QUADSPI interface, the write operation is not supported in memory mapped mode.
For the OCTOSPI interface the write operation is supported in memory mapped mode as mentioned in Getting started with Octo-SPI, Hexadeca-SPI, and XSPI Interface on STM32 MCUs - Application note
The QSPI examples can help you to write and read data from external memory.
Thank you.
Kaouthar
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2024-06-27 05:10 AM
Hello and welcome the community,
Could you please indicate where you did find this statement?:
"Can't be written to the memory when it is configured memory-mapped code execution mode"
2024-06-27 06:20 AM
Hello @Blk81 and welcome to the Community :),
For the QUADSPI interface, in memory-mapped mode, the external flash memory is seen as an internal memory but with some latency during accesses. Only read operations are allowed to the external flash memory in this mode. as mentioned in RM0433 section 23.3.12 QUADSPI use.
The indirect mode mode support read and write operations.
For more information I advise you to take a look at Quad-SPI interface on STM32 microcontrollers and microprocessors - Application note
For the QUADSPI interface, the write operation is not supported in memory mapped mode.
For the OCTOSPI interface the write operation is supported in memory mapped mode as mentioned in Getting started with Octo-SPI, Hexadeca-SPI, and XSPI Interface on STM32 MCUs - Application note
The QSPI examples can help you to write and read data from external memory.
Thank you.
Kaouthar
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2024-06-27 08:04 AM
Hi,
As described very well by Alex from APMemory:
There are some limitations on using QSPI /OSPI RAM chips with the STM32H7xx series, but when You use the right device it is working.
Martin
2024-06-27 09:04 AM
Pretty sure the H743 isn't supporting any memory mapped writes on Hyper RAM, etc.
Minimal 16-bit wide SDRAM probably going to soak up 30 or so pins.
If you want 128MB of RAM you're going to need to re-evaluate your part choice and foot-print to accommodate the memory and the pin escape for other peripherals.
The FMC having the least amount of choices for pin remapping.
Probably going to need to look at H72x/H73x or H7Ax/H7Bx devices with OCTOSPI
Perhaps PSRAM or whatever we're calling the multiplex RAM option. Although the capacity suggests SDRAM as the most viable.
2024-06-27 09:55 AM
Yes Tesla DeLorean is right, I had not realized that the STM32H74x familiy has only the "old" QSPI controller.
Sorry for that.
Martin
2024-06-27 10:34 AM
No worries, I wasn't looking to be critical.
The whole serial RAM situation is evolving, I'm not sure how mature half this stuff is, and ST has been improving support in designs moving forward, but they don't come back and revisit old stuff. Once a core design is released that's it, the die is generally not respun, certainly not the ARM portions. There's a strong desire not to have to requalify everything, and have issues with mixed IP on the support side. The approach has typically been to move forward/sideways to add features to new family members, and keep them pin-for-pin as much as possible.
Alex from APMemory has done a good job indicating which parts from them and STMicro play together.
2024-06-27 05:02 PM
Thanks for the information @KDJEM.1 , I really appreciate it.
2024-06-27 05:03 PM
Thanks for the info @Tesla DeLorean I really appreciate it.
2024-06-28 01:41 AM
Hello @Blk81 ,
Thank you for your contribution in STCommunity
Has your request been answered?
If you need further clarification, please do not hesitate to share it :).
If you request is answered, please click on Accept as Solution on the reply which solved your issue or answered your question.
Thank you.
Kaouthar
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