About SPI1,2,3 CLK Config

[pass3master]

We are developing using STM32H743.
We want to set 100MHz for SPI1 CLK and 117kHz for SPI2,3. However, we cannot set it because of "clock tree" and "maximum divisible limit is 256".
Is there any way to achieve the above configuration?

[KDJEM.1 · Accepted solution]

Hello @pass3master,

SPI1, SPI2, and SPI3 share the same clock source as mentioned in RM0433 Figure 51. Kernel clock distribution for SPIs and SPI/I2S. So, they have the same clock frequency.

If you want to configure different clock frequency for SPI, you can use SP1 and SPI4 for example.

Thank you.

Kaouthar

[pass3master]

Thank you for your response. We will close it now that we have clarified the specifications.