2025-06-10 6:25 AM
Hi All,
We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.
Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.
We are seeking a microcontroller that meets these specifications and provides an efficient solution.
Any suggestions will be appreciated.
Thank you in advance.
Jaydeep.
Solved! Go to Solution.
2025-06-10 8:03 AM
As @Javier1 said, if you want a 6ns cycle, this is a job for an fpga.
2025-06-10 11:28 PM
Hi @Javier1
Thanks for the reply.
are you planning to do a 2 level motor controler/three phase static inverter with some ugly bitbanged PWM?
I am not working on the motor controller. It is the "printhead" control mechanism which has the custom protocol for the interfacing. Also the data rate at which the printhead needs to be feed is very high.
>approximately 6ns.
You are describing FPGA style stuff
We are exploring weather the high-end MCUs are capable to do so rather then using FPGA?
We believed the MCU like STM32H7 would be able to do so and we have tried to do the simple frequency generation using Timer1 and data output to GPIO using DMA(Triggered through timer up event) and using D2 domain memory. We found that the DMA takes ~10ns to copy the data from memory to GPIO.
BTW, thanks for the suggestion.
Jaydeep
2025-06-10 11:37 PM
Hi @TDK ,
I understand that the resources will be utilized at a highly optimal level. However, we need to choose between an MCU and an FPGA. If the task can be accomplished with an MCU, that would be ideal for us, as switching to an FPGA would be more time-consuming for us.
Thanks you.
Jaydeep
2025-06-11 12:02 AM
@JaydeepRathod wrote:I am not working on the motor controller. It is the "printhead" control mechanism which has the custom protocol for the interfacing. Also the data rate at which the printhead needs to be feed is very high.
What protocol? Maybe driver chips exist that can drive this printhead. Then the MPU can just send data to the driver chip. Or combine an FPGA with a MPU. Many FPGAs have a build-in MCU or MPU.You can let the FPGA do the timing critical stuff and write the control logic in software.
2025-06-11 2:31 AM - edited 2025-06-11 2:32 AM
Hi @unsigned_char_array ,
This protocol is like the combination of handshaking signals (Contains the shift registers and latches operation) which are supposed to be controlled by our MCU. That is why, we need more GPIOs.
I think as suggested, the FPGA is more suitable option for this application.
Thank you very much @unsigned_char_array , @TDK , @Javier1, @AScha.3 , @Andrew Neil for help.
Jaydeep.
2025-06-11 2:36 AM
You're welcome.
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