2025-06-10 6:25 AM
Hi All,
We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.
Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.
We are seeking a microcontroller that meets these specifications and provides an efficient solution.
Any suggestions will be appreciated.
Thank you in advance.
Jaydeep.
Solved! Go to Solution.
2025-06-11 12:02 AM
@JaydeepRathod wrote:I am not working on the motor controller. It is the "printhead" control mechanism which has the custom protocol for the interfacing. Also the data rate at which the printhead needs to be feed is very high.
What protocol? Maybe driver chips exist that can drive this printhead. Then the MPU can just send data to the driver chip. Or combine an FPGA with a MPU. Many FPGAs have a build-in MCU or MPU.You can let the FPGA do the timing critical stuff and write the control logic in software.
2025-06-10 5:58 AM - last edited on 2025-06-10 7:13 AM by Andrew Neil
Merged - moved from MPUs forum.
Hi All,
We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.
Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.
We are seeking a microcontroller that meets these specifications and provides an efficient solution.
Any suggestions will be appreciated.
Thank you in advance.
Jaydeep.
2025-06-10 6:07 AM
@JaydeepRathod wrote:We are currently exploring microcontroller (sic?) options.
But you've posted in the micro-processor forum ?
Is that what you intended?
You can review the STM32 MPU family here, and sort by your required criteria:
https://www.st.com/en/microcontrollers-microprocessors/stm32-arm-cortex-mpus/products.html
2025-06-10 6:15 AM
Hi @Andrew Neil,
You are right, I have mistakenly posted it on MPU section.
Thank you for the attention.
2025-06-10 6:24 AM
> simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz.
No STM32MCUs will be able to do this.
2025-06-10 6:38 AM - last edited on 2025-06-10 6:53 AM by Andrew Neil
Duplicate - merged.
Hi All,
We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.
Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.
We are seeking a microcontroller that meets these specifications and provides an efficient solution.
Any suggestions will be appreciated.
Thank you in advance.
Jaydeep.
2025-06-10 6:39 AM
> simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz.
No STM32 MCU will be able to do this.
2025-06-10 6:49 AM - edited 2025-06-10 6:52 AM
>the system requires high-speed external RAM to process data of approximately 1GB data.
I would say all external RAMs ive seen around for signal processing type microcontrolers (FMC peripheral ) are in the MB range.
>approximately 6ns.
You are describing FPGA style stuff
are you planning to do a 2 level motor controler/three phase static inverter with some ugly bitbanged PWM?
2025-06-10 6:53 AM
Hi @TDK ,
Thank you for the suggestion. But can it be possible if I want to do it with 1 Port (12 GPIO)?.
Please ignore other similar posts by me as I have mistakenly written.
Thank you for the suggestion.
Jaydeep
2025-06-10 7:21 AM
Doubt it. You can't do it with DMA at 38 MHz. Maybe FMC could get there if you had a compatible interfaces but with everything else you have going on, you're going to be stressing all of the resources.