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Systick time missing

SRedd.5
Senior III

I am running the motor control workbench B-G431B-ESC1 board. The systick fires at every 2K frequency as per the user manual and the waveform matches when i toggle, but the problem is sometimes it misses as shown

SRedd5_0-1689998582490.png

I want to debug and find out why it misses those timings in between. Please suggest how do i find out? I am also running CAN in parallel at 500KBPS.

1 ACCEPTED SOLUTION

Accepted Solutions
SRedd.5
Senior III

I modified the algorithm of CAN and behavior is ok now, i mean i transmit 3 messages at one time, after 1 sec another 3 messages with total of 12 messages

1st sec -> 3messages

2nd sec -> 3 messages

3rd sec -> 3 messages

4th sec -> 3 messages

repeat like this.

View solution in original post

23 REPLIES 23
Johi
Senior III

What is the effect of disabling CAN?

Sorry for late response yes it is because of CAN task, how do i solve the problem? I will try to reduce the code in CAN ISR and put it in while(1).

No problem. Have you considered generating your waveform directly with a TIMER routed to GPIO or if the waveform is a bit more complex use DMA to drive GPIO and use a timer to drive the DMA timing? That way CAN ISR will not interfere with waveform generation. If needed I can provide an example code.

Bob S
Principal

DIsclaimer: I know nothing about the motor workbench code and run-time environment.

That said, if your "systick" is the normal ARM/STM32 systick timer, it typically defaults to the lowest interrupt priority.  You can change that and make it a higher priority (lower numeric value) than then CAN interrupts.  Presuming of course that the CAN interrupts can tolerate some delay when the systick interrupts them.  Or use a different timer (with a higher interrupt priority than the CAN interrupt) for that purpose.

Is the waveform you showed just "toggle a pin" inside the systick ISR to show when it is missed (or delayed), changing the priority may be all that is needed.  If that is indeed a waveform needed by your system, then changing to DMA/GPIO instead of code in an ISR as @Johi suggested might be needed.

My main concern is SysTick_Handler is missing timing in between. The code is as below.

void SysTick_Handler(void)
{
#ifdef MC_HAL_IS_USED
static uint8_t SystickDividerCounter = SYSTICK_DIVIDER;
  /* USER CODE BEGIN SysTick_IRQn 0 */
 
  /* USER CODE END SysTick_IRQn 0 */
  if (SystickDividerCounter == SYSTICK_DIVIDER)
  {
    HAL_IncTick();
    HAL_SYSTICK_IRQHandler();
    SystickDividerCounter = 0;
  }
  SystickDividerCounter ++;
#endif /* MC_HAL_IS_USED */
 
  /* USER CODE BEGIN SysTick_IRQn 1 */
  /* USER CODE END SysTick_IRQn 1 */
    MC_RunMotorControlTasks();
CAN_Task();
HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_12);
 
   /* USER CODE BEGIN SysTick_IRQn 2 */
  /* USER CODE END SysTick_IRQn 2 */
}
How do i increase the priority of Systick interrupt? I am toggling the GPIO inside Systick handler.
LCE
Principal

Search your files for "HAL_NVIC_SetPriority(SysTick_IRQn;" (might be in STM32xxx_hal.c)

and set it to:

HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);

As BobS said: lower number, higher priority. So give some higher numbers to the other interrupts.

Check the description before the declaration of HAL_NVIC_SetPriority.

SRedd.5
Senior III

When i searched this is what i found

HAL_NVIC_SetPriority(SysTick_IRQn, uwTickPrio, 0U);

#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */

uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */

hence uwTickPrio  is 16, but as per the ST documentation

@PAram PreemptPriority: The pre-emption priority for the IRQn channel.
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority

The priority can be between 0 to 15 only.

 

 

LCE
Principal

Simply set both priorities to 0.

SRedd.5
Senior III

Ok i will update the code.