Reference manual RM0383, "STM32F411xC/E advanced ARM®-based 32-bit MCUs", says:
18.6.7 I2C Status register 2 (I2C_SR2) Note: Reading I2C_SR2 after reading I2C_SR1 clears the ADDR flag, even if the ADDR flag wasset after reading I2C_SR1.
Consequently, I2C_SR2 must be read only when ADDR is found set in I2C_SR1 or when the STOPF bit is cleared.
But theSTM32F4 DSP and standard peripherals library, STSW-STM32065, doesn't check if the flag STOPF is cleared in I2C_CheckEvent():
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
ErrorStatus status = ERROR;
/* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_EVENT(I2C_EVENT));
/* Read the I2Cx status register */
flag1 = I2Cx->SR1;
/* I2C_SR2 must be read only when ADDR is found set in I2C_SR1 or when the STOPF bit is cleared */
if((flag1 & I2C_SR1_ADDR) || (flag1 & ~I2C_SR1_STOPF))
{
flag2 = I2Cx->SR2;
}
else
{
return ERROR;
}
flag2 = flag2 << 16;
What is the meaning of this check?
(flag1 & ~I2C_SR1_STOPF)
This is not check if the flag STOPF is cleared in I2C_SR2, this is setting a bit to zero.
Maybe it would be more correct this?
( !(flag1 & I2C_SR1_STOPF))
