Posted on February 12, 2014 at 01:22Hi,
Just a quick question on the EMI Interface and in particular chip selects. I am going to implement 1 bank of SRAM on a 16bit multiplexed bus. Obviously only one chip select required and I am using P7.0 (CS0). That leaves the other 3 EMI CS pins on P7 free.
Can I use these ports as general IO ports or are they fixed as CS pins when when EMI is implemented?
Cheers
#str912
