Hi there,
I am working with valve switch IC L9349-LF (L9349-LF - Quad intelligent power low side switch - STMicroelectronics) and is confused with the datasheet. Here are the questions:
- I understand Vdiag will follow Vin when the IC is working normally. In figure 4 it is shown there is a delay (diag. delay output OFF time) between Vin and Vidag. But what happened when Vin is rising? Will there be delay on Vdiag too?
- Also what happened if Vin logic high time is less than 65us? Will the waveform reflect on Vdiag as well?
- is there a secret latch reset sequence? From figure 7 it show the chip's DIAG pin will latch once over load. Then it further show EN pin 'shake' to reset the chip. But there is NO description in datasheet to describe this
- I have tried to lay out all the diagnostic logic on diagram. It seems their conditions will overlapped with each other (especially open load and overload), have I missed something? If not how to do diagnostic then?
Thanks for reading, any reply is appreciated
