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I am using the STM32F746NGH6 controller in my circuit to read external ADC (16bits) and transmits the same through USB. I have configured USB in OTG FS (device) MODE including AUTO detection. Test Set-Up.The USB is always connected and controller is powered on for testing and powered off after testing is completed Earlier observationThis was practiced for about two months and was working ok without any issues Current observationThe same is not able to recognize USB (i.e. auto detection is not happening) Further Analysis 1) On probing the circuit, it was observed that 3V is present at USB V-Bus line always after the board is power on, even without the USB cable connected Please clarify does it cause the issues. If yes, why and how Queries We would like you to clarify the following points about the user operation sequence1) Be the controller power on, when engaging and disengaging USB cable2) There is no need for any sequencing in user operation NOTE:We are in need of fix to avoi
Hi, guys. (admin, if this post is inappropriate please delete)So I am doing quite a complicated project (well for my skill level anyway) and my own code is stating to confuse me. Are there any guidelines for writing readable code in embedded development? I attached my whole project link below. my project on github Any tips would be helpful. I am no where near done and the amount of code I have to write is orders of magnitude away from being finished. I am using cube IDE for this project. A while ago I did try and transition over to vscode but I was getting a lot of issues with cmake and might have become allergic to it. I have also changed how cube ide looks a bit. below is an screenshot. tldrtips on orginising code so its easyer for me to follow my own stuff if you have any tips on making cubeide look better? attached link to my github project below.
Hello Team,We want to have Standalone Programmer based on ST`s Existing Flash Module Like St-Link V2, V3 Or Mini PCB tools.I should be able to Use External ST MCU to Command this SWD module for Flashing n all task , like CubeProgrammer.Basic Interface like Pushbutton to Start the Flash and Some LED to showcase any Error. We would not prefer expensive available off-the-Shelf Programmer like Segger..... Not want to use Rpi as well. This basically for FAE.Regards,
Hi,I'm working on a data-logging application using the STM32U575VGT6Q. I'm evaluating filesystem options for this.I have a few questions for the community/ST team:Is LittleFS officially supported on the STM32U575 series (or any STM32U5 platform)? Is there any official ST support, reference implementation, or roadmap for LittleFS on STM32U5, or on any STM32 series in general? I'm targeting an external OCTOSPI flash chip . Is there any official or community GitHub repo, example project, or app note demonstrating LittleFS's using OCTOSPI HAL driver on STM32U5? If anyone has done this integration themselves, could you share a reference implementation or point me to one? For an append-heavy, sequential data-logging use case on external NOR flash, which filesystem would you recommend between LittleFS, FatFS, and FileX+LevelX on this platform, and why?Any pointers — official documentation, GitHub repos, forum threads, or app notes — would be greatly appreciated.Thanks in advance.
Hello everyone,I used to work with U5 family microcontrollers. Recently I migrate to C5 families, and to MX2 UI.When I wanted to create interruptions for DMA UART events, normally I worked with RxEventCallback (classic). However, seems I´m not capable to find this same __weak function anywhere inside the hal_uart.c file. Am I missing something? I´m working with STM32C562R mcu, in CubeIDE 2.2Thank you everyone.
We are currently working on flashing an STM32L071KZ MCU using the STM32 bootloader.The flashing process completes successfully when using a 64-byte payload. However, when we reduce the payload size to 8, 16, or 32 bytes, we observe unexpected behavior. In each case, only the first 8, 16, or 32 bytes of every 64-byte flash block are programmed successfully, while the remaining writes within the same 64-byte block do not take effect. This pattern repeats consistently for every subsequent 64-byte-aligned address.We have verified that:The correct data is being transmitted to the MCU. The target flash address is incremented correctly for each write operation. The bootloader acknowledges the write commands.Despite this, the flash programming behaves correctly only when using a 64-byte payload.Is there any known limitation or programming requirement for the STM32L071KZ bootloader or flash controller regarding payload sizes? Are there any additional steps or constraints that must be followed w
Hello,I would like to add Secure Boot + SFU functionality to my TouchGFX app with STM32N6. Since it is a graphics app, i don’t want to partition the external flash memory as installation and download slots as shown in the ST wiki for OEMuROT. https://wiki.st.com/stm32mcu/wiki/Security:OEMuRoT_for_STM32N6 To use external memory for apps and assests efficiently; below architecture is more suitable for me. Which changes are needed in the ST example ROT projects? With this, is it possible to debug the app code? Normal boot │ ▼BootROM → Secure FSBL → verify App + Assets → HMI Firmware update │ ▼ USB / CAN │ signed package │ ▼ Secure FSBL │ signature + version check │ program NOR │ verify
Hi all,I have this demo board. I copied the BSP demo code to my own empty project to understand and learn how the LCD code works. I copied the code from the BSP demo function by function but I moved the code to my files (filenames and project tree folders) so it makes more sense to me. I'm at the point where the demo draws rectangles on the screen and the demo runs. I copied the touch panel stuff but it is disabled because it was getting stuck in the init function. I'll deal with the touch panel later.I can not get the function that draws the rectangles on the LCD to work more than once when I program the board with my project. If I try to debug and step thru the code it actually works. I traced the part where it "hangs" by adding a line to toggle the green LED in the board. The part where it hangs is in the Polling For DMA transfer function: (void)HAL_DMA2D_PollForTransfer(&hlcd_dma2d, 50);BTW I'm new to STM32U5G9J, never used it before. I read the reference manual for the MCU and
Environment & Hardware MCU: STM32F407ZET Test Temperature: -10°C to 5°C Application Context: Internal flash memory is actively used for data storage purposes When the MCU is interrupted specifically during an internal flash write operation (HAL_FLASH_Program)—either by a sudden VDD power-off or a hardware reset (NRST assertion)—it completely fails to boot upon the subsequent power-up or reset release. This issue is highly temperature-dependent and only occurs at low temperatures. If the interruption happens while the flash is idle, or if the board is at room temperature, the MCU reboots perfectly fine. Observed Symptoms & MeasurementsGarbage Vector Fetch: Attaching a debugger via hot-plugging shows that the CPU never reaches main(). Consequently, essential initialization routines like SystemClock_Config() and HAL_Init() are completely bypassed and fail to execute. Instead of fetching the correct reset vector from 0x08000004, the Program Counter is loaded with a garbage addr
I want progrma the STM32C071RBT6 for to get a virtual COM port.I’m using NUCLEO-C071RB board and this are the settings with Cube MX: I add some instructions into the main like this:int main(void){ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_CRC_Init(); MX_USB_PCD_Init(); MX_USBX_Device_Init(); _ux_dcd_stm32_initialize(0, (ULONG)&hpcd_USB_DRD_FS); if (HAL_PCD_Start(&hpcd_USB_DRD_FS) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { /* USER CODE END WHILE *
I am working on a batch script to disable TrustZone on an STM32U595VJT connected via JLINK using the STM32CubeProgrammer CLI tool.The device has both OEM1KEY and OEM2KEY set to [31:0] = 0xABCDEFAB, [63:32] = 0x12345678I am trying to run the following command when the RDP level is 1 and TrustZone is enabled with the device booted into the root secure services:STM32_Programmer_CLI.exe -c port=JLINK mode=HotPlug reset=HWrst freq=4000 ap=0 speed=Reliable -unlockRDP1 0xABCDEFAB 0x12345678 -ob RDP=0xAA TZEN=0The command fails to set the RDP level and TZEN flag with the following output: ------------------------------------------------------------------- STM32CubeProgrammer v2.20.0 -------------------------------------------------------------------Connecting to J-Link/Flasher ProbeWarning: The frequency input is not supported by the connected J-Link/Flasher !Device=Cortex-M33Unlock RDP1 password successfully doneDevice ID : 0x481Voltage : 3.33VFrequency
Heyho,I just found that the STM32L07 has too few DMA channels for my application, so I probably might need to use a DMA channel for two peripherals - surely not at the same time.So when switching the DMA request to another peripheral via DMA1->CSELR, is it enough to disable the DMA channel (DMA1_Channeln->CCR &= ~DMA_CCR_EN (no transfer active)), then set CSELR new? Thanks in advance!
Hello everyone, I have successfully controlled the Lin Engineering BL23E3301D04RO motor with the Nucleo-G474RE and IHM08M1 inverter .. using FOC configured in MC Workbench and the motor’s built-in encoder.I then copied the entire project and changed only the engine.Now I’m having trouble getting the following PMSM motor to run. Kt — 1.54 N·m/Arms Motor Constant Km— 1.63 Nm/sqrt(watt) RM (lin to line) at Amb — 0.60 Ohms Inductance — 2.24 mH Motor Poles — 16 Ipeak Motor — 51.19 Arms Tcont Stall — 20.74 N·m Icont Stall Motor — 13.60 Arms Tpk motor (25°C) — 64.54 Nm Rated speed — 1914 rpm Rated Power — 2826 W Inertia (KBM) — 5.69E-3 Kg-m² (4.20E-3 lb-ft-s²) Max Static Friction — 0.203 Nm (0.150 lb-ft) Cogging Friction — 0.102 Nm (0.075 lb-ft) Poles — 16 Back EMF Constant — 93.3 Vrms/kRPM In MC Workbench, I have set the following: I have configured the quadrature encoder to 2000 pulses per mechanical revolution. The power supply is CPX400S:Vout — 46V Iout,max
Hi,I'm trying to bring up an IMX219 (Raspberry Pi Camera Module v2) on the “x-cube-n6-camera-capture” reference project for nucleo657x0q, I first tried this under Zephyr and got working capture, but only at reduced resolution. I've since moved to writing a native driver for “stm32-mw-camera” instead, using “imx335.c” “cmw_imx335.c” as a structural reference template but only at the code/flow level since IMX335's actual register map isn't in any public datasheet I could find. For register values, PLL chain, and gain formula I relied entirely on the official Sony IMX219 datasheet instead, since the two sensors don't share a register layout.My questions are:1. Is there any official guidance for integrating a third-party sensor into `stm32-mw-camera` — driver/BSP side?2. Beyond the lane count and PHY bitrate, is there anything else specific to porting from a 4-lane sensor (IMX335) to a 2-lane one (IMX219) that I should watch out for? If writing a custom driver isn't the recommended path h
Device: STM32H7S3L8H6Datasheet DS14359 Rev 6, Table 26 "General operating conditions", gives forfCPU (CPU clock frequency): VOS low max 400 MHz VOS high max 600 MHz (8) footnote (8): "With ECC disabled"We cannot find any stated maximum for fCPU with the AXI-SRAM ECC ENABLED(user option byte ECC_ON_SRAM = 1). RM0477 mentions ECC only in connectionwith AXISRAM4 wait states, not with a frequency limit.This matters to us because ST's own OEMuRoT/BL2 reference code(OEMIROT_USER_SRAM_ECC in boot_hal_cfg.h) requires that option byte andrefuses to boot without it, so an application using the STiRoT + OEMuRoTsecure boot chain necessarily runs with ECC permanently enabled.Operating conditions on our side: VOS high (range 0), LDO supply,TJ <= 105 degC.Questions:1. What is the maximum fCPU for this device with ECC_ON_SRAM = 1?2. In the OEMuRoT reference code, SetSysClock() selects 380 MHz with the comment "to be functional with all hardware configurations (ECC_ON_SRAM enable
Hi, Following the original discussion here, this topic is split into a separate issue to remain aligned with Community guidelines and better visibility.DFU mode This processor can program the Option Bytes over DFU DFU ModeThis Processor is totally misdesignedIt exposes the Flash memory 3 timesFor me this looks like a severe bug.If you have a STM32G0B1 with read and write protection there is NO WAY over DFU get rid of these protections.
Greetings,I am working with nucleo_c5a3zg board and I am using zephyr RTOS for my project. I wanted to interface the sd card and try to do some data logging. I had a adafruit data logger shield which can fit on nucleo_c5a3zg board and there is a shield support in zephyr. When i build and uploaded the code i am getting a error that CMD8 is not supported. During debugging i found out that there is no state change on MISO line. Just to check if my code is wrong i tried same code with nucleo_f446re board and it works fine.Following is the capture from saleae loggic for necleo_c5a3zg board. I can provide other details like code, .dts file, etc.If someone can help me solve this issue it would be much appreciated.
I am working on an STM32N6 hardware design, and have reviewed both development kit reference designs (MB1939/MB1940). Both designs use the same power supply scheme, when using internal SMPS it has 2x 3V3 regulators and 3x 1V8 regulators.I am interested in combining several power supplies if possible, notably:1. Is it possible to tie all 3V3 together?While AN5967 suggests to apply VDD33USB in the last step of power sequencing, the VDD33USB supply is noted to be independent of the other supplies within the N6, just like the VDDIOx supplies. The reference designs have tied VDDIO4 to VDD at 3.3V, which makes me believe I could also combine VDD33USB and VDD.Aside from just VDD33USB and VDD, all the 3.3V peripherals on the dev kits come from the second 3V3 supply, can I tie all peripheral 3V3 to VDD33USB and VDD, so I have a single 3V3 rail on the PCB?If not what about the STM32N6 disallows this?2. Can I combine 1V8 for peripherals with VDD18AON?Is there anything against connecting
I’m trying to run a fork of the STM32N6-GettingStarted-ObjectDetection project for the STM32N6570-DK on my own board.My board has the same clock configuration, memory interface, and LCD interface as the STM32N6570-DK. However, instead of a CSI camera, I’m using an 8-bit parallel camera interface.The frames come from a custom FPGA source with the following parameters:75 MHz clock at 8 bit width bus YUV422 1280 × 768 30 fps Embedded synchronization ITU656My changes to the original project are:Added GPIO initialization for the 8-bit parallel camera interface. Changed the DCMIPP configuration from CSI to parallel mode:const DCMIPP_EmbeddedSyncCodesTypeDef syncСodes = { .FrameStartCode = 0xAB, /* frame SAV*/ .LineStartCode = 0x80, /* line SAV */ .LineEndCode = 0x9D, /* frame EAV */ .FrameEndCode = 0xB6 /* line EAV */};const DCMIPP_ParallelConfTypeDef pParallelConfig = { .Format = DCMIPP_FORMAT_YUV422, .VSPolarity = DCMIPP_VSPOLARITY_LOW, .HSPolarity = DCMIPP_
I’m using the MB1293 USB dongle as a daughter board for a project & am after the dimension between the 2 edge headers as I need to create a footprint on the main board. Is this information available, I’d rather not trust on manual measurement. See below,
ST moderator: New question split from this thread: Thanks, that could indeed explain the behavior we are seeing, since we are powering Vdd with 3.3V.Since the application requires a stable ADC reference, I would like to ask whether the STM32L475 provides any internal precision reference that can be selected as the ADC conversion reference.
We are seeing different SRAM2a availability between STM32WB15CC devices with different silicon/FUS revisions.On our older STM32WB15CC devices (silicon Rev B), the device has FUS version 1.2.2.0. On these devices, BRSD_A is set, so the complete 32 KB SRAM2a region (0x20030000–0x20037FFF) is non-secure and available to CPU1.On newer STM32WB15CC devices (silicon Rev Z), we see FUS version 2.2.0.1. On these devices, the relevant configuration is:BRSD_A = 0 SBRSA_A = 0x1A Secure SRAM2a therefore starts at 0x20036800 SFSA = 0x8C, corresponding to 0x08046000 SBR = 0x1180As a result, only 26 KB of SRAM2a (0x20030000–0x200367FF) appears to be available to CPU1, while the upper 6 KB is secure.There is no wireless stack installed, and our application does not use the wireless stack/CPU2 functionality.Our existing production firmware requires the full 32 KB SRAM2a. Reducing the linker region to 26 KB is therefore not a viable workaround.This has become a production-critical issue for us: our exist
Hello,I am working with an STM32L475RET and have encountered an unexpected behavior with the ADC reference voltage.My hardware configuration is the following:VDDA and VREF+ are tied together and supplied with a precise 2.5V reference. The ADC is configured for 12-bit conversions. The 2.5V reference has been verified with a multimeter and is stable. ADC clock source is set to 48MHzWhen measuring several analog input voltages, the ADC results consistently do not match the expected values assuming a 2.5V reference. I found that the measured ADC values correspond much more closely to an effective reference voltage of approximately 2.62V rather than 2.5V. To further investigate, I measured the internal VREFINT channel and compared the ADC result against the value expected from the datasheet, and assuming a 2.5V reference, the VREFINT result (1.167V) does not match the expected value:Using this initial config for the ADC:/** * @brief ADC1 Initialization Function * @param None * @retval No
Hi ST Community,We are using the hardware CRC peripheral in our project for CRC computation.During system initialization, we initialize and configure the CRC peripheral ourselves. However, we observed that after calling MX_TouchGFX_PreOSInit(), the CRC peripheral appears to be re-initialized.We would like to understand how TouchGFX uses the CRC peripheral internally.Specifically:Does TouchGFX use the hardware CRC peripheral only during the MX_TouchGFX_PreOSInit() phase? Is the CRC peripheral used by TouchGFX during frame rendering or while processing/displaying frames? Are there any other TouchGFX phases, functions, or background operations where the CRC peripheral may be accessed? If both TouchGFX and our application use the same hardware CRC peripheral, could sharing the peripheral cause any issues?Our concern is that our application relies on a specific CRC configuration, and we want to ensure that TouchGFX does not modify or reconfigure the CRC peripheral after our initialization,
Hello everyone, I'd like to use the LevelX API with FreeRTOS on an STM32H5 microcontroller. I know that LevelX is typically used with AzureRTOS, but I'd like to know if ST provides any guidance on integrating it with FreeRTOS or if anyone has any suggestions on how I can do this. Thanks for your help.
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