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RKume.1
Oct 13, 2026 5:48 PM UTC
Question

Multiple XSPI Devices

I have a project which could use both OCTOSPI RAM and Flash but I also need an OCTO or Quad SPI port for a high speed ADC.

It is unclear whether OCTOSPIM_Px_NCS1,2 can be configured to allow the memory to share one OCTOSPI port

and, if so, how to do it.  It is entirely possible that I am missing something but I would appreciate input on the topic.

Thanks.


 

7 replies

KDJEM.1
ST Technical Moderator
Oct 14, 2026 7:43 AM UTC

Hello ​@RKume.1 ;

 

Could you please precise which STM32H5 are you using?

If you use STM32H543/553xx, I recommend you to look at RM0481 section 25.4.21 Software control of two external memories and 25.4.22 Hardware-controlled extended memory support. These sections can help you to connect two external memories on one OCTOSPI interface.

 

Thank you.

Kaouthar

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RKume.1
RKume.1Author
Oct 14, 2026 2:21 PM UTC

Hello.

I am looking at the STM32H5E5 & STM32H5F5.  Our general strategy is to invest a little extra in our

microcontroller to allow for features that we have not yet thought of.  I might have gone with the H7 instead but the

H5 has more flash & ram.

 

 

RKume.1
RKume.1Author
Oct 14, 2026 2:29 PM UTC

According to RM0481 there are serious limitations on the use of the two chip selects for each octospi instance.

The hardware approach (which would be preferable) requires both devices to be of the same type (flash/flash or ram/ram) which rules out using a flash and ram device.

The software approach is similarly limited: 

“Intended operation is semistatic commutation, such as starting an application reading an
external flash memory and then, for the rest of the application, use an external SRAM
connected to the same I/O bus. From a memory-map point of view, these two memories are
located in the same address.”

 

KDJEM.1
ST Technical Moderator
Oct 14, 2026 4:11 PM UTC

Hello ​@RKume.1 ;

 

For STM32H5E5 and STM32H5F5, you need to refer to STM32H5E4/5F4 and STM32H5E5/5F5 Arm<Sup>®</Sup>-based 32-bit MCUs - Reference manual.

 

To connect HyperRAM and HyperFlash to same OCTOSPI interface, you can look at AN5050 section Octo-SPI mode when two external octal memories are connected.

Thank you.

Kaouthar

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RKume.1
RKume.1Author
Oct 14, 2026 4:36 PM UTC

Just so I am clear on this, the simple answer is that we cannot put Hyperflash and Hyperram on the same OctoSPI to be used during execution of our application. For example to use the ram for a frame buffer and the flash for a file system.

Is that correct?

 

 

KDJEM.1
ST Technical Moderator
Oct 15, 2026 9:46 AM UTC

Hello ​@RKume.1 ;

 

To connect HypeRAM and HyperFLASH, the solution is to use a different chip select GPIO pins for each memory. The two memories must be connected to the same OCTOSPI instance. The chip select of each memory must be connected to an OCTOSPI chip select GPIO pin as shown in the below figure. 

The software should configure the chip to select the GPIO pin for the memory to be accessed by driving the GPIO configuration. For example, when transmitting data to octo-SPI memory1, it is recommended to set the octo-SPI memory2 chip select pin (Pin2) to high voltage by using a pull-up resistor. In this case, the GPIO Pin2 is configured as GPIO output "Pull-up" and the Pin1 is configured as an alternate function.

If you want to connect different memories and to transfer data at the same time, you can use 2 OCTOSPIs interface.

Thank you.

Kaouthar

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RKume.1
RKume.1Author
Oct 15, 2026 6:52 PM UTC

I assume that having software control of the chip select pins precludes the use of DMA?