Inconsistency in the specification of STM32H753ZI maximum SPI4,5,6 clock frequency

[Gpeti]

Hello,

The datasheet of STM32H753ZI specifies the maximum SPI clock frequency that the chip supports. For SPI4,5,6 in Master mode it is 50MHz in rev V and 100MHz in rev Y (tables 105 and 204) for highest power supplies.

However in the reference manual of STM32H7, the SPI4,5,6 maximum kernel clock is 125MHz. Which means a SPI clock frequency of 62MHz (prescaler of 2 minimum). So it is not possible to reach the 100MHz for rev Y.

What is the correct information ? Is it possible to reach 100MHz for rev Y ?

[DFuchs]

Hi,

50MHz / 100MHz belong to VOS1 in reference manual and datasheet. I don't find anything to VOS0 in datasheet.

Kind regards

Daniel

[Gpeti]

You're right ! It's pretty complicated just to find out the maximum possible frequency of a SPI... Do you know how to find the information in VOS0 ?

[Gpeti]

BTW why isn't there VOS3 in the Table 55: kernel clock ditribution overview of the reference manual (that gives the maximum kernel clocks for peripherals ?

[DFuchs]

I think this is a typo in revision 6 and 7 of the reference manual. VOS2 at right side is VOS3.

Did you mean table 59? If you don't mean 59 there is Rev7 available.

[DFuchs]

I hope the reference manual is correct.

To be honest i'm happy when SPI is working with 10-20MHz on my board.

[Gpeti]

****, of course it is a typo, sorry about that.

[Imen GH]

​Hello,

Thanks for your feedback.

I recommend you to follow the revision V specifications.

Regards