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As an embedded developer, I already have CMake, Ninja, and the GNU Arm Embedded Toolchain installed and properly configured in my system PATH. These are standard development tools that many of us manage ourselves.What frustrates me is that the STM32 VS Code extension seems to completely ignore the existing environment and immediately downloads its own copies of CMake, Ninja, and arm-none-eabi-gcc.Why?Why not first check whether compatible versions already exist on the system? If they do, use them. If they don't, then offer to download them. That seems like a much more reasonable approach.The current behavior feels like this: Ignore the system environment Ignore tools already installed by the user Download another copy of everything anyway The result is duplicated toolchains, wasted disk space, and less control over the development environment.I understand that bundling dependencies may simplify onboarding for beginners, but experienced developers should have the option to use their

I am working with the STM32H7S3L8 MCU and using Zephyr RTOS for development. Currently, I see that Zephyr supports USB FS but does not seem to support USB HS for this MCU. Are there plans to add this support in future Zephyr releases? Any guidance or workarounds for enabling USB HS in Zephyr would be greatly appreciated. Thank you!

Bytewide DMA to a port: RAM to PD8-PD15, with a timer PWM used to generate /WR signal.I wonder if this will work. Some of it is a grey area. This is for loading a buffer into a ST7789 LCD controller, 66ns shortest cycle time.TIM1 and DMA1 are already used in my project.Digging around, it looks like TIM8 -> DMA2 should work, and a byte write to ODR+1 should land in ODR[15:8] and drive PD8-PD15.It also looks like PC6-8 can be used for the PWM output to produce the /WR. The timer overflow loads the next byte, so you have to load the 1st byte manually.There are some gotchas with spurious TIM behaviour. People found that with TIM8_UP, when you enable the timer, if the UGEN (update generation) bit or the initial configuration causes an immediate update event, you can get a spurious first trigger. You may have to set the UDIS bit or clear the update flag carefully, or use the ARPE/preload setup so the first genuine overflow is the first DMA trigger. One methid is after configuring TIM8 but

Hello @B.Montanari  I am working with the STM32N6570-DK board and facing an issue while configuring LTDC in a dual-project (FSBL + Application) setup. As an initial step, I tested the "LTDC_Horizontal_Mirroring" example provided for STM32N6. This example is built as an FSBL-only project, and after building and flashing it, the display works correctly as expected. However, my final goal is to use LVGL for GUI development. Since I need more memory space for image storage and application resources, I created two separate projects: FSBL project – responsible for boot and low-level initialization Application project – intended to handle LTDC and GUI (LVGL) In my setup: The device boots successfully. FSBL execution appears correct. Control jumps to the Application project. LTDC peripheral configuration in the Application project is replicated from the working example. RIF configuration is performed in the FSBL project. Despite this, the display remains gray after

Hello ST Community,I am using the NanoEdge AI Studio to generate an anomaly detection library for an STM32L4 device (fixed installation, vibration monitoring). The library works fine, but I need to persist the knowledge learned during runtime so that after a power cycle or reboot, the device does not have to learn again from scratch.I followed the official documentation and community advice (including the solution marked as accepted in [this thread](https://community.st.com/t5/edge-ai/is-there-any-way-to-save-or-export-knowledge-which/td-p/123456)):- Added the `.neai` section in my linker script with `KEEP(*(.neai))`- Declared `extern char _sneai_knowledge[];` and `extern char _eneai_knowledge[];`- Computed `NEAI_KNOWLEDGE_SIZE = (uint32_t)_eneai_knowledge - (uint32_t)_sneai_knowledge;`- Implemented functions to save this RAM section to internal Flash and restore it on boot.However, `NEAI_KNOWLEDGE_SIZE` is **0** and the `.map` file shows that the `.neai` section is empty:```.neai 0x20

Hello, MCU : STM32C011J4-SO8NBoard : Custom I am working on a Teleruptor and one of the feature is to control relay based on zero crossing due to relay latency.My test code is simple: while(1){ if(HAL_GPIO_ReadPin(ZERO_CROSSING_GPIO_Port, ZERO_CROSSING_Pin) == GPIO_PIN_SET) { RELAY_CTRL_GPIO_Port->BSRR = RELAY_CTRL_Pin; } else { RELAY_CTRL_GPIO_Port->BRR = RELAY_CTRL_Pin; }}I run my system at 3Mhz (Consumption matter) and I see a big clock jitter of (8-10us). Please see image below.Normally, this shouldn’t take more than 1-2us.I tried using EXTI but got the same issue.I tried to run system at 12Mhz and issue is resolved but I can’t. Question:Is this behavior normal at this speed?Is there any way I can reduce the jitter?  Thanks,Ayoub

Good morning everyone,If I explicitly set an array to a custom memory section, STM32CubeIDE for VSCode is unable to start a debug session, showing a an error popup with text: “bound doStepLoadImages Failed: Load failed”. I am using a NUCLEO-N657X0-Q board.This happens even if the section is linked to to the same memory region (and physical bank) where the the array would end up if left unspecified (linker script attached below).Example code:uint8_t img_buff[PICTURE_BUFFER_SIZE] __ALIGNED(16) __section(".image1");Examining the .map file, img_buff ends up at address 0x34006940, which is, correctly, in AXISRAM1. In this condition, debug doesn’t work.If I remove the __section(".image1")  part, the array is assigned (as expected) to section .bss.img_buff, ending up at address 0x340026b0, which is still in AXISRAM1, similarly to the other condition. Debug works as normal.The same issue arises if I place the array in AXISRAM2 (by assigning it to section .axisram2, cfr. linker script below). I

I posted something the other day; that thread is still open, and I'll close it once I have a solution. I think this information must be out there somewhere because right now it's very limited. Here is the thread: CDC HOSTAs I said, I have no problem with the development boards, but your reasoning means that I might still end up with the same problem in the end. Let me explain. We have 3 chips of the same model but in different packages. This means that the 3 chips have the same functions but a different number of ports.STM32F411CEU6 (UFQFPN48) / Dev Board: Weact Blackpill. (unofficial) (BlackPill Schematic)STM32F411RET6 (LQFP 64) / Dev Board: Nucleo-F411RE                       (Nucleo F411 Schematic)STM32F411VET6 (LQFP 100) / Dev Board: F411-Disco                             (Disco F411 Schematic)First, I should start by saying that tutorials for HOST/CDC mode are very rare. Usually, the code generated by CubeMX is reliable, and in this case, I was able to test the DEVICE/CDC part wit

Hi,I am creating an External QSPI Loader for STM32U5G7VJTx with MT25QL128A flash.* QSPI driver is implemented and tested successfully in a standalone STM32 project.* Read, Write, and Erase operations are working correctly.* For the External Loader project, I used the loader template files (Dev_Inf.c, Dev_Inf.h, linker script, etc.) and integrated my QSPI driver.* The loader builds successfully and generates the .stldr file without errors.However, when I load the external loader in STM32CubeProgrammer and try to program a .bin file to the external flash, I get the error: "Failed to download file".What additional changes are required after completing the QSPI driver coding step? Are there any common issues related to Init(), Write(), SectorErase(), linker configuration, or Dev_Inf settings that could cause this error?Any guidance would be appreciated.  

Hi,We recently bought a STM32H757I-Eval board and played around with it. This did overwrite the demo program it came with so I downloaded the stm32h757i-eval_demo.zip package to restore the demo.I used STMCubeProgrammer for this, did a full chip erase and pointed it at the hex demo file. The programming failed with                       Error : failed to download Sector[0]I tried the other hex demo files in the with the same result and on two different laptops and the latest CubeProgrammer.The weird thing is that when I power the board the demo seems to work as when new so I don’t know if only part of it is working. It could even have arrived in this condition.Anyone else have this problem? and perhaps a fix?I did try to compile one of the examples from the x-cube-azrtos-h7-v3-5-0.zip package to see if the generated hex would program ok.After a few issues I loaded the program with CubeIDE in debug mode and found the code would enter an infinite loop:                        while ((PWR-

Hello.I have project for STM32U575 created in CubeIDE just before new release of separate CubeIDE and CubeMX.I imported it into the new version of CubeIDE (2.1.1, it asked whether to “renew” project, and I clicked "yes").Both then and now, the project has this warnings:I didn't pay attention to it earlier because the project was working, but now I see that there are more and more strange problems in it. Could it be because of that?What could cause such warnings? This part of code is not mine, but generated by CubeMX.I didn’t have this warnings on another project for STM32H7.HAL code looks very similar for H7 and U5:H7:U5:But only the one for U5 generating warnings.

I'm using STM32N6570-DK board and developing an image processing application.When I tried to use STM32CubeMX to generate the project, I was able to set DCMIPP Pipe1 just like the attached screen capture.I would like to downsize the source image data to 800x480, but I could not find the option field in the DCMIPP Configuration view in STM32CubeMX.Is there something that I missed?My STM32CubeMX is Version 6.16.1 for Windows 11.  

Hi everyone,we applied the ST FWU reference solution on our own platform based on the STM32MP157F.The solution was taken and adapted from the ST Yocto layer meta-st-ota (https://github.com/PRG-MPU-CUST/meta-st-ota). SummaryWhen performing consecutive updates using the ST FWU reference implementation (TF-A FWU metadata + RAUC + post-install.sh + rauc-mark-good.service), the FWU rollback boot counter keeps decreasing across successful updates. Expectation: after each successful boot of a newly updated bank (and rauc-mark-good.service finishing successfully), the FWU boot counter should be reset to the initial value (4 in this setup).Actual: the FWU boot counter is decremented (4 → 3 → 2) with each update cycle, even though the system was marked good. This suggests that the rollback counter is not being reset by the rauc-mark-good integration in the ST FWU reference solution.(full log is attached, including metadata content printed in hexa after each step) Reproduction

According to AN5054, to prepare SFI (secure internal firmware install) or SFIx (secure external firmware install) "STM32 Trusted Package Creator" is required. Were do I find it? Searching ST website I find no such software product. Was it maybe recently replaced or "absorbed" by STM32Cube Programmer?

I’m using stm32 nucleo f401re and expansion board gnss2a1 vic3da.I am trying to obtain raw real data using it. But i could only obtain NMEA format data. How can i bypass and obtain raw data? currently I am using default software package code and tried modifying it for my requirements. But i couldnt obtain it.

As the title suggests My program on a Nucleo H7S3L8 stops running when D cache is enabled (appearently it does not go into Hardfault mode). However, when the line SCB_EnableDCache() is commented, it starts again running. Since I need D cache I configured the MPU for where the dma buffers of the project are located, since I’ve read that it could be a cache coherency problem with DMAs, but neither this solution solves the problem. I’ve read somewhere that is XSPI2_HSLV OTP that must be enabled on STM32CubeProgrammer, but I’ve checked and this is enabled! How the problem can be solved? I’ll upload the project

Hello,I am using STM32CubeMX with an STM32WBA63 project in TrustZone enabled mode, and I have a question about interrupt security attribution.My use case:PA11 is configured as USART2_RX (non-secure application). In low power mode, I need wakeup on UART RX activity. This relies on EXTI11, so I need EXTI11_IRQn to be targeted to the Non-Secure world (ITNS0 bit 22 = 1).Issue:In CubeMX, I cannot find a way to set EXTI11_IRQn as Non-Secure while PA11 is kept as USART2_RX. EXTI11 appears configurable only if I change the pin function to GPIO EXTI, but then USART2 configuration becomes incomplete.Questions:Is it supported in STM32CubeMX to configure EXTI11_IRQn as Non-Secure when PA11 is assigned to USART2_RX? If yes, where is this setting in the CubeMX UI? If not currently supported, what is the recommended ST approach? Manual USER CODE override in partition configuration? Post-generation patch/script? Any other official best practice? Current workaround:I manually set EXTI11 to Non-Secure

Hello ST Community,Following your suggestion @Onizuka09, I developed a software program as per the example STM32H753_SecureMem_ExampleV1.1.After updating the software, I noticed that the part for printing strings via UART (printf) was missing, but it had already been downloaded to the MCU and the software was started. After correcting the code for the printf prints, I no longer want to connect via ST-LINK to download the software to the MCU.So, I try connecting with the STM32CubeProgrammer to attempt to erase all the flash memory. This popup appears:Even if I change modes such as "Under Reset" and "Core Reset," this popup appears:I'm afraid that when the software started, even without seeing the strings in printf via UART, it may have set some security parameters, or option bytes, or disabled Boot for CM7 and CM4.The software had an option that allowed you to reset those parameters and return to the ST-LINK connection mode without any problems.So, is there a way to connect to the STM32

Hi all, Is this possible with a DMA on an STM32N6 device, using the HPDMA/GPDMA? (or I assume the H7 is quite similar, I believe?)Source array: RGBRGBRGBRGB (24 bpp) Destination array: xRGBxRGBxRGBxRGB (32 bpp)Or vice verca:Source array: xRGBxRGBxRGBxRGB (32 bpp) Destination array: RGBRGBRGBRGB (24 bpp) This would solve my issue, where I need both the 24bpp (NPU input) and a jpeg-encodable format (display; which all seem to be either 16bpp or 32bpp). If the above is not possible, then … I’d be open to suggestions on what else to do… Best regards, rphii

Subject: MC Workbench 6.4.2 — Custom Power Board JSON: 'No algorithm available' and missing connection paths errorDear ST Motor Control Support Team,I am writing to request help with creating a custom power board JSON template for MC Workbench 6.4.2.I have a custom BLDC motor control board using the TI DRV8316CT 3-phase integrated FET driver connected to a NUCLEO-G431RB (STM32G431RB). I have created a custom power board JSON file and placed it in the boards/power/ folder, but when I select it in MC Workbench I get the following errors:1. "Mandatory Phase Voltage Generation feature is not defined or there are not connection paths between hardware signals and relative MCU resources for the feature."2. "Mandatory Current Sensing Feature for FOC/HSO algorithm is not defined or there are not connection paths between hardware signals and relative MCU resources for the feature."3. "No algorithm is available for this hardware configuration."My hardware configuration:- Control board: NUCLEO-G43

hello ST CommunityIs it possible to erase all flash memory including the protection by shorting some hardware pins?thanks for supports

Good morning,I'm writing here to ask for help resolving a problem we're having with a custom board that uses a HYPERRAM bus and external RAM chip. Specifically, if Infineon S70KL1282GABHV020 memory is installed on the board, we can easily access byte/word/dword reads and writes, even at a 166MHz clock speed.Needing more external RAM, we installed the ISSI IS66WVH64M8DBLL-166B1LI chip (64MB).However, we can no longer access it properly. Specifically, if we try to access bytes at even addresses, the system seems to work. If we access odd addresses, however, we start to experience access errors. Even lowering the clock frequency to 25MHz, the problem persists.To avoid layout issues, we replaced the hyperram on the STM32H735-DK evb with the ISSI chip, and the behavior is similar.Below is part of the hyperbus initialization code and the code we use for testing the entire memory. /* Initialize OctoSPI ----------------------------------------------------- */ OSPIHandle.Instance = OCTOSPI2;

Posted on October 29, 2017 at 01:12Hi all,I would like to report a bug of CubeMX.I did generated simple project for STM32F103VEx.  Project if fairly simple just uses USB in CDC mode.I did generate similar project for same processor but only SPI3 using shared pins PB3 and PB4 with JTAG.Each time while I did generated those projects CubeMX forces to distable whole debug communication JTAG +SWDby adding line    /**DISABLE: JTAG-DP Disabled and SW-DP Disabled      */   __HAL_AFIO_REMAP_SWJ_DISABLE();While SWD could be turned on since it does not conflicts with any of those peripherals. STM32 have options to disable only JTAG or either distable only NRJST pin in JTAG. Why CubeMX forces to kill all of the debug communication ?Simple project attached. Example file located in testCDC/stm32f1xx_hal_msp.c function void HAL_MspInit(void)https://community.st.com/tags♯/?tags=stm32%20cube%20mx https://community.st.com/tags♯/?tags=stm32f103%20usb https://

Hi,I am evaluating the ST25R200 using the ST25R200 Eval GUI. In Reader Mode, there is a Field Measurement tab that displays a numerical value together with a circular indicator. However, the displayed value does not appear to have any unit.Could you please clarify:What exactly is being measured in this tab? Does the value correspond to a physical quantity (e.g., magnetic field strength, ADC count, RSSI, amplitude, etc.)? Is there a conversion from the displayed value to a standard unit (A/m, µT, V, etc.)? Which ST25R200 registers or measurement circuitry are used to obtain this value? Is this functionality available through the ST25R200 firmware/API so that it can be implemented in a custom application?Any explanation of the measurement principle and interpretation of the displayed value would be greatly appreciated.Thank you.

Hello ST Community,I am working with the STEVAL-DPSLLCK1 LLC full-bridge evaluation kit, specifically the STEVAL-DPS334C1 STM32F334 control board. My goal is to access and monitor the LLC firmware variables using STM32CubeMonitor through ST-LINK.For STM32CubeMonitor variable access, I need a firmware executable with debug symbols, such as an IAR .out file or an ELF file. The .bin file is not sufficient because it does not contain variable names or debug information.I downloaded the available ST firmware package for the LLC kit and opened the IAR workspace in IAR Embedded Workbench for ARM 9.70.4. IAR asked to convert the old project to the newer format, and I accepted the conversion. After conversion, the project fails to build, so no .out file is generated.The main errors are:Error[Pe018]: expected a ")"These occur mainly in:Control_Layer.cFault_Processing.cLLC_PWMnCurrVoltFdbk.cStateMachine.cparser.y / y.tab.cThere are also many warnings like:Warning: The header file 'cmsis_iar.h' is