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RAK3172 + ChirpStack FUOTA: Class-C session confirmed active, but zero radio IRQ activity (no RxDone / RxTimeout / RxError) — multicast fragments never received on one of two identical devicesSummaryI have two identical devices (same firmware, same hardware BOM) running FUOTA over LoRaWAN using a RAK3172 module (STM32WLE5-based, AT-command slave) driven by an STM32H7 host MCU. One device completes FUOTA perfectly every time. The second device — same code, same ChirpStack FUOTA deployment, same gateway — gets all the way to a confirmed Class-C switch and then receives nothing. No fragments, no radio errors, nothing.I’ve isolated this down to the radio IRQ level and would like input from anyone who has hit something similar with RAK3172 / STM32WL Class-C behavior.SetupEnd device MCU: STM32H7 (host), communicating with RAK3172 over UART using AT commands LoRa modem: RAK3172 (STM32WLE5 based), running STM32CubeWL / LoRaMac-node stack LNS: ChirpStack v4.17.0 (self-hosted) FUOTA: ChirpStack
I am having a hard time to use a JLink via IP on the local LAN. I can connect, but every time I launch a debug session, a pop-up from Segger appears asking me for the JLink identifier: I have to enter the IP address, and then it works. But this is rather nerving to have to enter the IP address every time I launch a debug/run session.It seems that the extension does not officially support JLink over IP. If this is true, please add this important feature in a future update. Specifically that the jlinkgdbtarget configuration type in the launch.json schema be updated to support an ipAddress field or a generic serverArgs/serverParameters array (matching how they already handle stgdbtarget and openocdtarget).Currently because the extension forces a hardcoded string layout and uses the silent (-s) flag, it actively suppresses SEGGER's standard native fallbacks (like reading workspace JLinkGDBServer.ini files).Thank you for an otherwise excellent tool (STM extensions + VSC).
#include "dac.h"#include "main.h"#define CURRENT_MIN 5#define CURRENT_MAX 400#define DAC_MIN 248 // 0.2 V#define DAC_MAX 4095 // 3.3 Vvoid DAC_Init(void){ HAL_DAC_Start(&hdac1, DAC_CHANNEL_1); HAL_DAC_SetValue(&hdac1, DAC_CHANNEL_1, DAC_ALIGN_12B_R, 4095);}void DAC_SetCurrent(uint16_t current){ uint32_t dac; if(current < CURRENT_MIN) current = CURRENT_MIN; if(current > CURRENT_MAX) current = CURRENT_MAX; dac = DAC_MIN + (((uint32_t)(current - CURRENT_MIN) * (DAC_MAX - DAC_MIN)) / (CURRENT_MAX - CURRENT_MIN)); HAL_DAC_SetValue(&hdac1, DAC_CHANNEL_1, DAC_ALIGN_12B_R, dac);}void DAC_OutputOff(void){ HAL_DAC_SetValue(&hdac1, DAC_CHANNEL_1, DAC_ALIGN_12B_R, 0);}
Hello SirI’d like to know your goods label rules.it’s only have Assemble country information, no Wafer production country information? here’s my stock label information. and now i have a new batch need impoted and the documents was wrote COO is Morocco.the Customs asked us provide the Country of Origin Certificate.could you please support ?
On an STM32L552ZE with TZEN=1, RDP=0xAA (Level 0) and BOOT_LOCK=1, the STM32CubeProgrammer command -rdu reported success while explicitly stating that no option byte was modified. From that command onward the device is permanently inaccessible: DAUTHSTATUS shows secure invasive and non-invasive debug disabled, every FLASH register (secure and non-secure alias) fails even on read, and the documented RDP regression path (RDP=0xBB → RDP=0xAA TZEN=0x0) can no longer be executed because option byte programming requires those registers.We would like to understand whether this is expected behaviour, and whether any recovery path exists.Hardware and toolsItem Value Device STM32L552ZE-Q on NUCLEO-L552ZE-Q Device ID 0x472, Revision ID Rev Z (DBGMCU_IDCODE = 0x20016472) ST-LINK onboard, firmware V2J48M35 (also reproduced with V2J47M34) STM32CubeProgrammer 2.23.0 (also reproduced with 2.22.0) Supply 3.26–3.27 V, separate USB port BOOT0 (PH3) tied to VCC during all operations de
Under this configuration, the prompt indicates that the attribute "liveWatch" is not allowed. { "type": "jlinkgdbtarget", "request": "launch", "name": "STM32Cube: Launch JLink GDB Server", "origin": "snippet", "cwd": "${workspaceFolder}", "preBuild": "${command:st-stm32-ide-debug-launch.build}", "runEntry": "main", "imagesAndSymbols": [ { "imageFileName": "${command:st-stm32-ide-debug-launch.get-projects-binary-from-context1}" } ], "liveWatch": { "enabled": true, "samplesPerSecond": "4" } },This is the analysis conducted by GPT.STM32CubeIDE for Visual Studio Code 3.10.0JLinkDebugTargetAdapter correctly creates the Live Watch client.However, the Live Watch client immediately issues-var-createwhile the target is running.SEGGER J-Link GDB Server returnsCannot execu
Hi sir,I have a question regarding the hardware connection of Pin 3 (SCx) on the LSM6DSOW when operating in Mode 1.According to the datasheet, Pin 3 should be connected to VDDIO or GND in Mode 1. However, in our current design, this pin is connected to an MCU GPIO to maintain hardware compatibility with another project that utilizes the Sensor Hub (Mode 2) feature. Our intention is to drive this GPIO LOW to satisfy the Mode 1 requirement.We have a concern regarding the power-up sequence: In our system, the IMU and MCU are powered simultaneously. However, there is a short delay during the MCU's boot-up phase before the GPIO can be initialized and driven LOW. During this window, Pin 3 of the LSM6DSOW will be in a floating state (input without pull-up).Our proposed software flow is as follows:System power-up (IMU and MCU together).MCU drives the Pin 3 GPIO to output LOW as soon as its firmware initializes.MCU issues a Software Reset (SW_RESET in CTRL3_C, 12h) to the LSM6DSOW.Proceed with
Everything was working normally until STM32CubeIDE prompted an ST-Link firmware upgrade. After performing the upgrade, ST-Link connectivity became unreliable and eventually stopped working entirely — both through CubeIDE's Run/Debug and through standalone STM32CubeProgrammer.Timeline1. Board was flashing/debugging normally the day before.2. STM32CubeIDE displayed a prompt indicating a newer ST-Link firmware version was available.3. Performed the ST-Link firmware upgrade (via the standalone STLinkUpgrade.jar tool bundled with STM32CubeProgrammer).4. After the upgrade, started getting a mix of symptoms: board not detected at all, connecting and then immediately losing connection, and STM32CubeProgrammer intermittently responding/not responding.Exact errors observedFrom STM32CubeIDE's ST-Link GDB server (during a Run/Debug launch):STMicroelectronics ST-LINK GDB server. Version 7.10.0...Target no device foundError in initializing ST-LINK device.Reason: No device found on target.From standa
Hi there ! I start to work with this shield, and i use one STM32G071 for control the UART comunication. The module work at 115200baute rate , and i use the AT command for comunicate with her. So everthingh work fine except when i send ATE0 for turn off the echo this command send back ok but afther i send the other command the answert i receive it’s look like the echo still on . Examplke i send AT\r\n i receive back AT\r\n\r\nok\r\n i try to wait to send the next command but nothingh still dosen’t work. I know i can continus to work eaven send me back the echo but this stuff make me crazy because i don’t understand if is one my problem or if the shield. The UART is configurate with interrupt and i configure the rx in this way every time i receive one byte in the callback i save inside one buffer and outside the callback i check if i receive OK or ERROR. Some one know how to resolve this problem ? Thank You Sergio
I have a STM32C031C6 and I’m trying to set the clock to be 48MHz It works when I have the for loops in there, but its not supposed to have them and I want to get it working properly without needing them.If I comment out 1 of the for loops, then after that it gives me this error I’m not sure what I am doing wrong, I think I’m not waiting properly for something, but I don’t know what that is.Error in executing 'cont' command ...Target is not responding, retrying...Target is not responding, retrying...Shutting down...Target is not responding, retrying… This is the code.#include "stm32c031xx.h"void speed_up_to_48mhz(void){ // 1. ENABLE HSI and wait for the HSI to become Ready RCC->CR |= (1U << 8); while (!(RCC->CR & (1U << 10))); for(volatile int i =0; i<1000000; i++){} //bit 8 is prefetch //bit 9 is instruction cache //1 wait state FLASH->ACR = (1U << 9) | (1U << 0); FLASH->ACR &=~ (1U
Dear ST Community Team,We are working on the STM32N657X0H3Q microcontroller and interfacing two Infineon S80KS5123GABHB020 Octal HYPERRAM devices using the XSPI1 interface in the dual-octal (16-bit) configuration, as shown in the STM32N6 Reference Manual (Figure 196 – XSPI block diagram for dual-octal configuration).In our hardware design:MCU: STM32N657X0H3Q Interface: XSPI1 Memory devices: 2 × Infineon S80KS5123GABHB020 Octal HYPERRAM Configuration: Dual-octal mode (two 8-bit memories operating as a single 16-bit memory interface) Both memories are connected according to the STM32N6 dual-octal configuration.We would like guidance on how to correctly configure this setup in STM32CubeMX.Could you please provide the recommended CubeMX configuration for the following?How should XSPI1 be configured for dual-octal mode? Which Memory Type should be selected for the S80KS5123GABHB020? How should the chip select (NCS) signals be configured for two memories operating in dual mode? Are there an
Hello,I am integrating Mbed TLS with TLS 1.3 on an STM32H573 using the STM32 Secure Manager PSA interface.The TLS 1.3 handshake fails at: psa_key_derivation_setup( &operation, PSA_ALG_HKDF_EXTRACT(PSA_ALG_SHA_256));The returned status is: PSA_ERROR_NOT_SUPPORTED /* -134 */I tested the relevant algorithms separately: PSA_ALG_HKDF(PSA_ALG_SHA_256)→ PSA_SUCCESSPSA_ALG_HKDF_EXTRACT(PSA_ALG_SHA_256)→ PSA_ERROR_NOT_SUPPORTEDPSA_ALG_HKDF_EXPAND(PSA_ALG_SHA_256)→ PSA_ERROR_NOT_SUPPORTEDThe generated algorithm ID is correct: PSA_ALG_HKDF_EXTRACT(PSA_ALG_SHA_256) == 0x08000409UI also traced the call through the Non-Secure PSA client. The request reaches the Secure Manager via nscall(), and PSA_ERROR_NOT_SUPPORTED is returned in psa_reply->status.My questions are:Does STM32 Secure Manager support PSA_ALG_HKDF_EXTRACT and PSA_ALG_HKDF_EXPAND? Is support dependent on the Secure Manager or SMAK version? Is TLS 1.3 with Mbed TLS officially supported with Secure Manager as PSA backend? Is
We are using a mix of stm32 - G473, H503, H523, H563, H573.For each of these, we have a bootloader that locks the chip security (to Closed for full regression with password on the H5s).If we inadvertently put the wrong bootloader on a board, some combinations will brick the board - specifically, loading 523 or 563 bootloaders onto 503 or 573 boards goes to the closed state without a useful password in place.I would like to programmatically check that each bootloader is running on its expected target before setting security. I see the IDCODE register contains 0x484 for STM32H562/563/573, or 0x478 for STM32H523/533. Unfortunately this distinguishes the 523/563 which is not such a problem for us, but not the 563/573 which is our problem.Ideally, I would like a (different) function for each of our micros that will run correctly on the expected micro but return an error (or possibly hard fault) on anything else.Thanks
I am unable to start a project from STM32CubeMX running on Linux Mint. I have no proxy setup on my network and verified the same with Connection Parameters > Check Connection. I also tried the steps with another ISP, however the issue persists. What is the fix for this?
Hi everyone,I have published a small bare-metal USB-C Power Delivery sink example for STM32 MCUs with the built-in UCPD peripheral:https://github.com/robobtnet/stm32-usb-pd-baremetal-sinkThe goal is to keep it minimal and portable:- no FreeRTOS- no ST USB-PD middleware- only two core files: pd_bm.c and pd_bm.h- configurable sink profiles- starts from the highest configured voltage profile, then falls back to lower profiles- reports the selected PD contract through the APIThe current tested setup is NUCLEO-G474RE using UCPD1. I also added porting notes for STM32U5/GPDMA based on an STM32U575 test project.I would appreciate tests and feedback on other STM32 families or boards that include UCPD, especially:- STM32G0- STM32G4- STM32U5- STM32L5- boards using UCPD2- boards using GPDMA instead of classic DMA- different USB-C PD chargers and PDO combinationsThis is not intended to be a full USB-PD stack. It is a lightweight sink-only example for simple cases where the MCU only needs to request
Hello,I have two batches of products with different silk screen printing. Can you please help me check if there are any change instructions?STM32F107VCT6
Hello,I am trying to use the M95M04 as a SPI slave device from the ADI DS28E18 one-wire bridge. A picture has been uploaded to show the entire hardware setup. My main issue is that whenever I try to send data to the EEprom and then read that data back, I only get FF as a result. When setting write enable or write disable, the MISO line pulls low like would be expected and returns 00. I have used an oscilloscope with a bus decoder to ensure that the correct commands are being sent out of the DS28E18 to the M95M04, and they are. We never see the WIP bit go high, and we have tried many changes in both the hardware and the software. Our current hardware setup is based off of the schematic image I have posted, but there have been some modifications. C1001 has been changed to 10uF X7R, C1002 has been changed to 1uF X7R, and 10k pull-up resistors have been added on the S# and D pins. From the software side, I have attached the code that our software engineer is using. I have tried replacing t
I am encountering an issue with ADC readings on a custom board based on the STM32H533CET6.Hardware Setup: I have a simple analog filter connected to the ADC input. I have verified the input signal with a multimeter, and it correctly varies from 0V to 3V.The Problem: Despite the varying input voltage, the value in the ADC_DR register appears to be stuck at 1024. It does not change regardless of the voltage level applied to the pin.Configuration details:Resolution: 12-bitVREF+: 3.3VHas anyone experienced a similar issue with the H5 series or sees what I might be missing?
Anybody worked with STM32F446RE in WOKWE? please guide, or suggest best simulator for STM32F446RE.
Configuration:I2C address: 0x6A Bus speed: 100kHz (standard mode) ODR: 1920Hz for both XL and GY (ISM330BX_XL_ODR_AT_1920Hz, ISM330BX_GY_ODR_AT_1920Hz) Full scale: ±125dps gyro, ±4G accel Reading a 14-byte burst starting at register 0x20 (TEMP + GYRO + ACCEL) once every 10ms, from our control loop. The application currently checks the IMU every 10ms.My intention is:Every 10ms, determine whether a fresh IMU sample is available. If fresh data is available, start one interrupt-driven burst read (gyro + accel). When the transfer completes, update the application variables once. Ignore intermediate samples produced by the IMU between 10ms periods.Polling-based implementationInitially, we have implemented the IMU driver using a polling-based I²C implementation (partially based on an open-source GitHub driver). During long-duration testing, the application hung/resetting inside the blocking I²C loops. Code for this method is attached in attachment 1.Interrupt-based implementationTo overcome t
Hi,Maybe someone has encountered a similar problem. I've been working on it for a few days now and unfortunately with no results, so I'm looking for help here. Maybe I'm doing something wrong.Board / setupST NUCLEO-N657X0-Q (reference board). MCU: STM32N657X0HxQ (VFBGA264). On-board external NOR: MX25UM51245G in Octal DTR mode on XSPI2 (external loader: MX25UM51245G_STM32N6570-NUCLEO.stldr). FSBL's XSPI init/memory-mapped-enable code is based on the XSPI_NOR_MemoryMapped_DTR reference example for this board.Boot chain: FSBL (runs from AXISRAM2, never itself XIP) → MCUboot (Direct-XIP + Direct-XIP-Revert, single image, ECDSA P-256) → verifies and jumps into the Application, which executes Direct-XIP directly from the same XSPI2 memory-mapped NOR (no copy to RAM for the app itself).GoalFrom within the running Application (while it is executing Direct-XIP from XSPI2), temporarily exit memory-mapped mode, write to the flash (initially just the MCUboot trailer image_ok flag, eventually firm
I have an existing IOC project originally created using STM32CubeMX v6.6.1 with STM32Cube Firmware Package FW_L4 v1.17.2. When opening this project, STM32CubeMX fails to properly render the UI (see error message below).During this issue:All Save-related menu options are disabled (greyed out). The project filename displayed in the upper-right corner includes a *, indicating unsaved modifications. When attempting to close the project or exit the application, a prompt appears to save changes, but the project cannot actually be saved.Given this behavior, I would like clarification on the following:Could the IOC file be corrupted? Is this strictly a UI rendering issue, or something deeper (e.g., metadata or version incompatibility)? What is the likely root cause of this error, and how can it be resolved? 2026-07-01 09:08:40,585 [FATAL] ProcessBarDialog:168 - ProcessBarDialog action 4java.util.concurrent.ExecutionException: java.lang.ArrayIndexOutOfBoundsException: Index 1 out of bounds for
Hi , I recently acquired an ST4SIM-300M eSIM and I am unsure how the ST4SIM-300M should be activated initially.I also watched your video about Remote SIM Provisioning using the Motive eSIM Secure Connect portal, and I would like to ask whether the activation and profile download for this SIM should be done through that portal.Additionally, I would like to understand whether the SIM already contains a bootstrap profile by default. If so, how can I verify this from the device?Finally, I would appreciate it if you could share a list of your eIM partners that support the ST4SIM-300M for testing purposes
Hi Community,An STM32L073R Nucleo board straight out the packet. Plug in the USB cable and immediately, the L073 gets VERY hot. LD2 is flashing which I presume is an application running in the micro. Have removed the jumper JP6 which supplies the L073 with power and everything remains cool (as we would expect) As soon as I replace the link the micro again, heats up.The power supply measured at JP6 with the link removed is a good 3.3V. and the board is recognised as a USB drive when connected.I have an older F401 Nucleo board which works without issue in the same setup.Any ideas or suggestions?
what i suppose Is this: the PIN BST attached to the inductor keep switching to a value higher and lower than VDH, when he goes lower than VDH then the diode Is off, and nothing Is supplying energy to VDH pin, thats why that capacitor Is there, It acts a reservoir, i came to this explaination by imaging the circuit without that cap. Is this assumption right? Thanks all for the help
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