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For STM32C562RE, why can CubeProgrammer validate the OEM key and report "RDP2 unlocked successfully", while the RDP regression does not erase the existing user flash and flash erase remains prohibited? Is this a known CubeProgrammer/ST-LINK limitation or does this indicate that the device was provisioned with a non-regressible security configuration?Device: STM32C562RETx / NUCLEO-C562RECubeProgrammer: v2.22.0ST-LINK: V3J17M11SWD connection works.Device ID: 0x44E.OEM key is available.RDP unlock operation sometimes reports:"Validation Status: 3"followed by:"RDP2 unlocked successfully"After physical power removal and restoration:RDP_level = 0xFF (Unknown Value)Flash still contains:0x08000000 : 200007C8 08000671 0800073D 08000735Mass erase:Error: Mass erase operation failed. Please verify flash protectionProgramming:Erasing internal memory sector 0Error: failed to erase memory

Hi,I want to start a custom board design using STM32F405 but later I want to upgrade to STM32F407.Below are the features I want to target.Ethernet (IEEE802.3, TCP/IP< DHCP, MAC, SNTP) Can ethernet (10/100) over SPI interface (W5500) will work for STM32F405?  USB OTG HOST UART x3 Analog 12-16 bit PWM input: at least 10KHz 8-bit Parallel interface for display.Is there any development platform available to cater all these features.Also, please suggest the programming tool as well for production.Let me know if you have any questions.Thanks, Mukesh

In this thread:There is a PDF attached.On the old forum, attached PDFs could be viewed online - without having to download.I can’t see how to do that now - clicking, or right-clicking and choosing ‘open in new tab’ both just try to start a download.Am I missing something?

I just got a notification to tell me that a solution has been marked in one of my own threads.I really don’t need a notification to tell me that - because I did it myself! In general, it’s only the thread creator who can mark the solution - so the thread creator should never need a notification of this.(the exception would be when a moderator marks a solution, but that is an exception - not usual)

I am using the STM32F746NGH6 controller in my circuit to read external ADC (16bits) and transmits the same through USB. I have configured USB in OTG FS (device) MODE including AUTO detection.  Test Set-Up.The USB is always connected and controller is powered on for testing and powered off after testing is completed Earlier observationThis was practiced for about two months and was working ok without any issues Current observationThe same is not able to recognize USB (i.e. auto detection is not happening) Further Analysis 1) On probing the circuit, it was observed that 3V is present at USB V-Bus line always after the board is power on, even without the USB cable connected  Please clarify does it cause the issues. If yes, why and how Queries We would like you to clarify the following points about the user operation sequence1)    Be the controller power on, when engaging and disengaging USB cable2)    There is no need for any sequencing in user operation NOTE:We are in need of fix to avoi

Hi All,We are developing a BMS application using the SPC560B50L1 microcontroller with SPC5 Studio, and need help with two topics:1) Low-Power Mode Wakeup via PA4 (WKPU9)We want to put the SPC560B50L1 into a low-power mode (STOP/STANDBY) and wake it up using pin PA4, which maps to WKPU channel 9 as per the SPC560Bxx Reference Manual (RM0017, Table 96 - Wakeup Vector Mapping).However, in SPC5 Studio, under "SPC560BCxx Low Level Drivers Component RLA" -> "Enabled Drivers", there is no dedicated WKPU driver option available (unlike some other device families, e.g. SPC582Bxx, which do expose a WKPU checkbox).Could someone please help with:- The correct/recommended way to configure WKPU9 (PA4) as a system wakeup source on SPC560B50L1 within SPC5 Studio- Any example project or reference code demonstrating:  a) EIRQ/WKPU channel configuration for a specific pin  b) Enabling system wakeup capability (WRER register or equivalent) so the configured pin can wake the MCU from STOP/STANDBY mode 

Hello ST Community,I am working with an STM32H7S78-DK board and trying to perform Debug Authentication using STM32CubeProgrammer v2.21.0.The Discovery sequence succeeds successfully, and the target is detected correctly. However, the Debug Authentication fails after selecting the required permission.EnvironmentBoard: STM32H7S78-DK STM32CubeProgrammer: v2.21.0 SDM Library: v1.2.0 SDA version: 2.0.0 PSA lifecycle: ST_LIFECYCLE_CLOSED PSA authentication version: 1.0 Cryptosystem: Ecdsa-P256 SHA256 Key: Keys/key_3_leaf.pem Certificate: Certificates/cert_leaf_chain.b64 Password: Binary/password.binDiscovery resultThe discovery command completes successfully      -------------------------------------------------------------------                       STM32CubeProgrammer v2.21.0      -------------------------------------------------------------------Start Debug Authentication SequenceOpen SDM LibSDMOpen                       :   624 : open       : SDM API v1.0SDMOpen                       :

We are planning to use the 30 W Wireless Power Receiver IC (P/N: STWLC89JRO) in our product and would appreciate your support in providing the following information at the earliest:Technical Datasheet Design Guide / Reference Design Documents

We are a large electronics company that has been collaborating with ST for over a dozen years.We are currently designing a wireless charger for one of our automotive clients and plan to launch mass production within a few months. Unfortunately, we are unable to test the hardware we have designed because we cannot obtain the necessary STSW-WBC2STUDIO software.Please provide access to STSW-WBC2STUDIO.Thank you in advance for your prompt assistance.Best Regards

Tool versions (let me know if more details are needed on this):Zephyr RTOS  v4.4.0STEdgeAI Core V4.0.0ST Edge AI Core v4.0.0-20500 359356bb0 STM32CubeAI 12.0.0-RC4Board: Nucleo N657X0 Q (nucelo_n657x0_q from Zephyr RTOS boards configuration) I generated NPU deployable code from the int8 quantized CNN model using this command:stedgeai analyze -m ./CNN_int8.onnx --type onnx --target stm32n6 --st-neural-art I tried to integrate the generated code in the zephyr environment for deployment. But the application fails when the calls to read the weight from external flash is requested using the APIs.The application is such that there are certain things running in the MCU after which the NN code is called using teh generated code from STEdgeAI Core tool and quantized CNN model. Succeeded calls (successful calls from the network code):LL_ATON_DECLARE_NAMED_NN_INSTANCE_AND_INTERFACELL_ATON_RT_Reset_NetworkLL_ATON_Input_Buffers_Info_networkLL_ATON_Output_Buffers_Info_networkLL_Buffer_addr_start  

Hello ST team,  Could you please provide the steval-wbc2tx70 & STWBC2-HP documentation.

Hi all,I'm trying to get the PLS UDE Starterkit debugger working with the SPC56B-Discovery board (SPC560B54L5) and consistently hit the same error on every connection attempt:PpcJtagTargIntf: Can't connect target!PpcJtagTargIntf: Failed to open communication channel!FtdiCommDev: Failed to open FTDI device driver!Setup:- SPC5 Studio 6.0 + HighTec GCC, project builds clean (0 errors)- PLS UDE Starterkit 2021.05, correct target config (stm_spc560b54_bolero_discovery_starterkit_debug_jtag.cfg)- Board shows correctly in Device Manager as "PLS USB JTAG Adapter for SPC5xxx A/B", VID_263D PID_4001, no driver warnings- Reinstalled the driver using the bundled InstallPlsUsbJtagDriver script- Ran UDE as Administrator, tried multiple USB ports, full system restartDespite all of this, the error is 100% reproducible — every attempt, exact same message. Sometimes the device also disappears from Device Manager right after a failed attempt.Has anyone run into this exact combination before? Open to tryi

I found an issue while using STM32F051, and the background is that I want to generate an interrupt when the host receives a CRC error, in order to perform my error handling in the interrupt handler. But when a CRC error occurred, the CPU did not jump into the interrupt service function. At this point, I checked that the CRCERR flag was raised and the ERRIE interrupt enable was also enabled. I have tried other conditions that can trigger error flags to generate interrupts, such as OVR, FRE, MODF, etc. These flag bits can generate interrupts and enter the interrupt service function, which proves that my interrupt enable steps are correct. I carefully reviewed the manual again, and it clearly states that when ERRIE is set, CRCERR can trigger an interrupt. So I want to know if there are some hardware defects that did not connect the CRCERR signal to the NVIC.

In this case, I want to debug a new control board whose MCU is STM32H563. But I didn’t have a proper debugger, so I want to use the ST-LINK debugger of the STM32H5 Nucleo-144 board for the new board’s debugging.The debugger connector of the STM32H5 Nucleo-144 board : The debugger connector of my own board : I want to connect the 2 connectors through a cable for the external board’s debugging.So currently my issue is that the ST-LINK debugger can’t be used on the external board, I tried some methods for this, but it didn’t work, such as removing the jumper of JP5, connecting the jumper for JP1. My question is that : Can the ST-LINK debugger of STM32H5 Nucleo-144 board be used on an external board, if possible please show me the steps of the configurations on the Nucleo board.

Hello,I just purchased two STM32H5E5 Nucleo boards along with two of the ST Memory board kits. What I am planning is to take one of the QSPI flash M.2 boards and reconfigure it so that the memory(s) attached to OCTOSPI1 are two identical flash chips, and have two identical 64Mb PSRAMs attached to OCTOSPI2. Reading the octospi section of the reference manual it appears that each “bank” can share the clk and the OCTOSPI(1/2) chip selects and putting the respective OCTOSPI channels in DMM mode and have them memory mapped. Also, I have moved a SB on the Nucleo so that OCTOSPI2_NCS is connected to the M2.0 connector.  I have included a pic of what I am trying to do. Any help would be appreciated.  Thank you, 

Hello,According to Table 56 (Output voltage characteristics for all I/Os) in the STM32MP213FAL datasheet, the maximum VOL is specified as 0.4V under high load conditions (IOL = 5.5mA to 20mA).In my application, the connected device has a strict VIL(Min) requirement of 0.35V. My actual load current is very low, around 10uA.While I understand that VOL should stay very close to 0V under such a low load due to the CMOS structure, the datasheet only provides the Max 0.4V limit.Strictly speaking, this does not show a match with my 0.35V requirement on paper.Could you provide any reference curves, typical characteristics, or internal RON (on-resistance) values for the I/O pins to confirm that VOL drops well below 0.35V under a 10uA load? Thank you in advance for your support. 

Hello everyone!I just wanted to share with you all the pinout of NUCLEO-C542RC and STM32C542RCT6. I just moved from STM32F013RB, which had a lot of schematics online, but currently the C5 series has close to none.The pinout list all the available functions for each pin. I hope it’ll be as useful for you as it was for me. I attached to this post the drawio file, for easy edits.If you have any recommendation, please let me know. 

 I have redrawn the NUCLEO-H5E5ZJ schematic as a personal exercise in understanding the architecture of the board and the STM32H5E5. I have consolidated the original multi-sheet design into a main STM32H5E5 schematic and a separate STLINK schematic, using port objects to make the principal interconnections explicit. During the redraw, I cross-checked the connectivity against ST's original Altium design files and the more recent PDF schematics.My aim was to show the MCU GPIO ports rather than their alternate functions, as I found this gave me a different picture of how the MCU is connected to the board. The exercise also revealed just how much functionality is exposed by the NUCLEO-H5E5ZJ PCB: the usefulness of the M.2 Key A socket, the extensive possibilities offered by the other headers, and, in particular, the surprisingly large number of MCU GPIOs that are brought out to them and are available.I have a great deal of respect for the NUCLEO-H5E5ZJ PCB and for the STM32H5E5. The capabi

Looking at the Ethernet PHY circuit of the STM32H735G-DK, the MCU and MAC are connected via the RMII interface, and a pin named "RMII_RX_ER" is connected to the MCU.However, if you configure it for RMII in CubeMX (version 6.18.1), this pin does not activate normally. If the user manually activates it with the mouse, the pin is marked in yellow, meaning the function is not properly enabled Therefore, I checked the official Demo FW located in STM32Cube\Repository\STM32Cube_FW_H7_V1.13.0\Projects\STM32H735G-DK\Applications\LwIP\LwIP_TCP_Echo_Server\STM32CubeIDE, and even there, the pin is configured as GPIO_AF11_ETH. I am curious why it was designed and developed this way when it only gets configured but doesn't actually function. Is it just missing from the ETH group in the CubeMX DB? Or is it originally an unsupported feature, but ended up like this because an existing circuit design was just recycled?

I noticed that stm32c5xx_hal_fdcan.c uses C language bitfields to access device registers. Since bitfields are compiler specific, every knowledgeable embedded software engineer knows that using bitfields to access device registers is non-standard and not to be used. I suggest that using bitfields to access device registers be changed. You can refer to STM32CubeH7 for correctly accessing device registers. BTW. I tried to open a support issue in the on-line support, but received the following error:Case_trigger: execution of AfterInsert caused by: System.DmlException: Update failed. First exception on row 0 with id 0033W00000YERuSQAX; first error: FIELD_CUSTOM_VALIDATION_EXCEPTION, Please specify a valid Zip Code: [] Class.CaseUtility.addInfoToContactAndLead: line 231, column 1 Trigger.Case_trigger: line 38, column 1

so this is my data acquisition system, i want you to suggest some improvements in it. as the adc + dma ping pong buffer is working fine, but after that the conversion and its transmission via dma+uart ping-pong buffer is so much miserable. there is no synch between these buffers.here is my project:Vishwas1523/dataAcquisitionSystemPS: i am using stm32 nucleo f446re

Hello everyone,Actually I am making a data acquisition system in which my mcu takes analog data from a sensor and stores it in a buffer, and then into a 2nd buffer with the help of DMA in double buffer mode. Now i want to transfer this data via UART to my screen with the help of PuTTY with the same ping-pong architecture. For this i need to convert 12 bit adc value to data suitable for uart (8 bit). which i do with the help of a function without any issue and then store them in different two buffers. now the thing is that i want a system in which when buffer 1 is being filled by adc, buffer two will be transferred by uart and vice versa, now the main problem is that there is no sync between the buffers and the ownership. and it is mostly due to the conversion and size of buffers (uart buffers are twice the size of adc buffers) as i am using double buffer transmission mode in DMA controllers of both adc and uart.So do you think i should use single buffer transmission with circular buffe

Hi ST Community, I’ve connected a MP23DB01HPTR MEM MIC to the STM32N6 Nucleo’s MDF1_SDI3 and MDF1_CCK0 and here is my connection.   I am using“ Projects/STM32N6570-DK/Examples/MDF/MDF_AudioRecorder” as a reference and according to the information on Github, the CCK0 should be 2.048 MHz Which I am measuring almost the same frequency on the CCK0 pin of my board : 2.03393 MHz  In my project, instead of sending the data to SAI, I am sending the data to USART 1, which I’ve set the BaudRate to 921600. My code has three callback functions:void HAL_MDF_AcqHalfCpltCallback(MDF_HandleTypeDef *hmdf)void HAL_MDF_AcqCpltCallback(MDF_HandleTypeDef *hmdf)void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) The USART 1 is sending the first half of the MDF buffer when the AcqHalfCpltCallback is triggered, and then the second half when the AcqCpltCallback is triggered. on my computer I wrote a python script  where it is receiving the audio raw data via serial port and save it into a WAV file. However

Hi ST Support Team,We encountered a reproducible HardFault when running an object detection model on the STM32N6570-DK, and have completed extensive isolation testing. We believe this points to an issue in the STEdgeAI 4.0.1 / Neural-ART toolchain combined with the Getting Started reference application (concurrent camera/display/NPU usage), rather than a configuration mistake on our side.[Environment]- Board: STM32N6570-DK (with IMX335 camera)- Project: Getting Started Object Detection App (stm32ai-modelzoo-services)- Model: st_yoloxn (1 class, 416x416), Quantized (input: uint8 / output: int8)- Toolchain: STEdgeAI Developer Cloud v4.0.1 (forced by cloud; v4.0.0 is no longer offered, though the project's own README states the shipped model files were generated with v4.0.0)[Symptom]Build, flash, and boot-from-flash all complete without error, but the LCD stays black. Debugging via STM32CubeIDE shows a HardFault during NPU inference:HardFault_Handler()__LL_ATON_RT_IrqErr(irqs)   // ll_ato

Body:I would like to replace the AI model in the STM32N6570-DK sample project "STM32N6-GettingStarted-ImageClassification" and run it in standalone mode.Purpose:My goal is simply to try running different AI models, not for development purposes. I would like to confirm operation by powering the board ON/OFF without using a debugger.Environment:Board: STM32N6570-DK IDE: STM32CubeIDE 2.2.0 STM32CubeAI StudioWhat I want to do:I am currently trying to generate C code using STM32CubeAI Studio from the following AI model provided by STMicroelectronics, and replace the files in the sample project:https://github.com/STMicroelectronics/stm32ai-modelzoo/blob/main/image_classification/mobilenetv2/Public_pretrainedmodel_public_dataset/ImageNet/mobilenetv2_a035_128/mobilenetv2_a035_128_int8.tfliteI am also interested in whether it is possible to run third-party AI models in the same way, such as models from the following repository:https://github.com/PINTO0309/PINTO_model_zooQuestions:What is the co