About RongShengWang

RongShengWang · 2024-11-26

Hi, The reference manual says - "In differential input mode, the analog voltage to be converted for channel “i” is the differencebetween the external voltage VINP[i] (positive input) and VINN[i] (negative input". "In single-ended input mode...

RongShengWang · 2024-11-25

Hi, We apply the single-end analog inputs to STM32H753ADC 1, 2, 3 respectively. .1. ADC 1, 2, 3 have total 60 channels. But only 36 different analog signals are allowed to be connected since there are 16 channels shared by all ADC 1, 2, 3, plus 8 ...

RongShengWang · 2024-11-23

Hi,Can all selected channel's sampling in each SAR ADC(0, 1, 2) be trigged by the same timer with the same settings so that their sample can be synchronized ?Thanks

RongShengWang · 2024-11-22

Hi,1. Can the selected input channels to ADC0, ADC1 and ADC2 in STM32H753ZI be sampled simultaneously under the same sampling clock?2. NUCLEO-H753ZI ADC does not accept the analog negative signal inputs. Is there any STM32H7 dev board(s) accepting th...

RongShengWang · 2024-11-22

Hi,1. I bought NUCLEO-H753ZI board, but we can't find any firmware demo project for the NUCLEO-H753ZI board in downloaded "en.stm32cubeh7_v1-11-0" (Its directory "NUCLEO-H753ZI" is empty). We need the ADC firmware demo projects for NUCLEO-H753ZI b...

RongShengWang · 2024-11-28

Thanks again. Only one more question -The datasheets (STM32H753ZI) says (P173) - "the VREF– s available only on UFBGA176+25 andTFBGA240+25" It shows the negative input exists in UFBGA176+25 and TFBGA240+25 packages" . Also the reference manual says ...

RongShengWang · 2024-11-28

Thanks, ELABI.1 - Yes, we only want to use all 3 ADCs simultaneously by using a timer to trigger the 3 ADCs. ADC 1, 2, 3 have total 60 channels. But only 36 different analog signals are allowed to be connected since there are 16 channels shared by...

RongShengWang · 2024-11-27

Thanks

RongShengWang · 2024-11-27

As you said, I need ST support engineer to answer my question - Please let ST support engineer to answer my questionThe datasheets (STM32H753ZI) says (P173) - "the VREF– s available only on UFBGA176+25 andTFBGA240+25" It shows the negative input exis...

RongShengWang · 2024-11-27

As you said, I need ST support engineer to answer my question - Please let ST support engineer to answer my questionThe datasheets (STM32H753ZI) says (P173) - "the VREF– s available only on UFBGA176+25 andTFBGA240+25" It shows the negative input exis...

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Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal?

Questions about the SAR ADC channels and configurations for our application

Can all selected channel's sampling in each SAR ADC(0-2) be trigged by the same timer so that their samples can be synchronized ?

STM32H753ZI: Can ADC0, ADC1 & ADC2 be sampled simultaneously with same clock?

In "en.stm32cubeh7_v1-11-0" we can't find demo project for NUCLEO-H753ZI board

Re: Can the selected channels to ADC0, ADC1 and ADC2 in STM32H753ZI be sampled simultaneously under the same sampling clock?

Re: Can the selected channels to ADC0, ADC1 and ADC2 in STM32H753ZI be sampled simultaneously under the same sampling clock?

Re: Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal?

Re: Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal?

Re: Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal?