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Voltage Scale 4 not possible with SDMMC for STM32U575ZITxQ, Cube MX, Low Level

BSmit.7
Associate II

Hi,

I'm building a project using Cube MX (LL drivers) for the STM32U575ZITxQ processor (has SMPS) and I would like to get the processor into LL_PWR_REGU_VOLTAGE_SCALE4. Setting the MSIS to 16MHz achieves this but when I add in the 4 bit SDMMC interface in Cube MX the auto generated code only sets the regulator voltage to LL_PWR_REGU_VOLTAGE_SCALE3. This results in higher power consumption.

I am aware of the clock limitations of the SDMMC vs AHB bus and have adjusted PLL1P (sources SDMMC clock) to 16 MHz.

If I manually change the code to set it to SCALE 4 every thing seems to work ok but I would rather not deviate from the auto generated Cube MX code. Is it possible to achieve voltage scale 4 with SDMMC?

Many thanks

Ben

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1 ACCEPTED SOLUTION

Accepted Solutions
Sara BEN HADJ YAHYA
ST Employee

Hello @BSmit.7​ ,

Actually this is a normal behavior, Range 4 is not allowed when using PLLs, HSI48 not divided by 2 or MSKI/MSIS having 48 MHz.

0693W00000JP8mYQAT.pngSDMMC uses either PLL1P or CLK48 as a source clock. In this case, Range 4 can be selected, when SDMMC uses CLK48 and CLK48 Clock Mux is set to MSIK.

0693W00000JP8kOQAT.png 0693W00000JP8nCQAT.pngPS: Adjust the frequencies according to your application and please make sure to enable LSE as it is required by the MSIK to calibrate itself.

I Hope this helps :)

If your issue is solved, please close this post by clicking the "Select as Best" button. This will help other members of the community find this response more quickly :)

Sara.


In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

View solution in original post

4 REPLIES 4
Sara BEN HADJ YAHYA
ST Employee

Hello @BSmit.7​ ,

Thanks for your feedback,

Could you please share your ioc file and specify the CubeMX version ?

Thanks,

Sara.


In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.
BSmit.7
Associate II

Hi Sara,

Thanks for looking into this; Cube MX version 6.4.0.

The attached ioc file has:

  • All modules set to LL in project manager
  • MSIS set to 24MHz on the clock configuration
  • the PLLM *N multiplier set to 16
  • the PLL1P divider set to 8
  • resulting in an SDMMC clock of 16 MHz
  • SDMMC module disabled

Generating the code as-is for the ioc file will put the processor into LL_PWR_REGU_VOLTAGE_SCALE4 - line 124 of main.c for me.

If you enable the SDMMC1 in 4 bit mode this changes to LL_PWR_REGU_VOLTAGE_SCALE3

Many thanks

Ben

Sara BEN HADJ YAHYA
ST Employee

Hello @BSmit.7​ ,

Actually this is a normal behavior, Range 4 is not allowed when using PLLs, HSI48 not divided by 2 or MSKI/MSIS having 48 MHz.

0693W00000JP8mYQAT.pngSDMMC uses either PLL1P or CLK48 as a source clock. In this case, Range 4 can be selected, when SDMMC uses CLK48 and CLK48 Clock Mux is set to MSIK.

0693W00000JP8kOQAT.png 0693W00000JP8nCQAT.pngPS: Adjust the frequencies according to your application and please make sure to enable LSE as it is required by the MSIK to calibrate itself.

I Hope this helps :)

If your issue is solved, please close this post by clicking the "Select as Best" button. This will help other members of the community find this response more quickly :)

Sara.


In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Thanks Sara, that has sorted it!

Ben