Hiya!
I'm trying to figure out the clock config for my micro. I'm using ADC3 IN1 currently, and using the internal HSI clock source. Using the default settings, I can't seem to get anything better than 3.3 MSPS, and this is with a 10-Bit ADC resolution. From what I read, I should be able to get around 4 to 5 MSPS!
However, that's assuming the ADC is clocked at 60 MHz. By defualt, the ADC clock is divided by 4, so the resulting clock is at 42.5 MHz. Okay! So, I just need to change the divider ratio/or clock it to the PLLP to fix this.
However, I can't figure out a good way to get the prescaler to be okay with an async clock mode with a divider less than 4.
I've tried changing the PLLP clock divider ratio down to 6, which gives the ADC a clock of 56.666667. Won't let me change the prescaler still, stuck at async divide by 4.
Tried a PLLP clock divider of 5, which gives 68 MHz. Still can't change it to lower than 4.
And changing the PLLP clock DOES impact my performance; I can change my trigger timer value and see my maximum sample speed change. If I manually change this line of code,
hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4;
to lower divider values, it works as expected, and I get the higher sampling rates I want.
Why is CubeMX throwing a fit about this?
Using STM32CubeIDE 1.14.0. STM32G474-DPOW board.
